%! TEX root = ../thesis.tex
\chapter{Theory}
This Chapter will be discussing the fundamental principles used in the experiments. These will contain the circuis and their respective Equations as well as component behaviour as specified in their respective Datasheets by their Manufacturer

\section{Hardware Component Behavior}
Before discussing the experimental results it needs to be clear what circuitry is used in these experiments and what behavior we expect. 
Keeping in mind, that these values are purely theoretical and will most likely not be exactly the same as those found in actual hardware.

Each of the three voltage regimes that will be observed on the PowerIt Board, 48V 9.6V and 1.8V, has a voltage- and in the cases of 48V and 1.8V also a current-measurement circuit. Additionaly we have a temperature sensor built into the STM32 Chip.
\subsection{48V Input Voltage}
\begin{figure}[H]
    \centering
    \includegraphics[width=.9\textwidth]{./tikz/mon48v.pdf}
    \caption{Circuit for measuring the 48V input Voltage, consisting of input potential (left), two resistors as voltage divider, one full differential isolation amplifier (full Diff Op Amp, left), one operational Amplifier (right), output voltage as well as the connection to the STM32-Chips input pin (right)}%
    \label{mon48v}
\end{figure}

The circuits for measuring input Voltage and current are the most complex, because for Voltage measurement the circuit needs to
\begin{itemize}
    \item divide our input voltage into a usable potential range
    \item decouple the input from our signal potential
    \item amplify the voltage, to be in the Chips Voltage range of 0--3.3V
\end{itemize}

The already implemented Cicuit can be seen in \autoref{mon48v}. It consists of a 1:240 Voltage Divider, a full differential isolation amplifier taking in the $\approx$ 200mV (nominal voltage range), and amplifying it by a factor of 8 ($r_\text{diffOpAmp}$~\cite{diffopamp}). It is also decoupling the input and output voltages, so our 48V and 3.3V circuit parts are electricly insulated. The remaining operational amplifier provides futher amplification by a factor of 1.1 ($r_\text{OpAmp}$)

This circuit results in the following equation for calculating the input voltage from a pin voltage:

\begin{align}
    V_\text{48V in}\cdot\frac{R_1}{R_1+R_2} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} =&~V_\text{48V pin}\nonumber\\
    \Leftrightarrow \quad \frac{V_\text{48V pin}}{r_\text{diffOpAmp}\cdot r_\text{OpAmp}}\cdot\frac{R_1+R_2}{R_1} =&~V_\text{48V in}
\end{align}


\subsection{48V Input Current}

\begin{figure}[H]
    \centering
    \includegraphics[width=.9\textwidth]{./tikz/mon48i.pdf}
    \caption{Circuit for measuring the 48V input Current, consisting of the powerit Input Circuit, one shunt-resistor, one full diff isolating Amplifier, one operational amplifier, output potential, as well as the connection to the STM32-Chip input pin}%
    \label{mon48i}
\end{figure}

In case of the current measurement circuit we require the following:
\begin{enumerate}
    \item use a shunt resistor, with minimal heat dissipation 
    \item still providing a good resolution also within the Chips Specifications
\end{enumerate}

Here we use the same Amplifiers and so we can use the following equation for our input current:
\begin{align}
    I_\text{48V IN}\cdot R_\text{shunt} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} = V_\text{48I pin}\nonumber\\
    \Leftrightarrow\qud \frac{V_\text{48I pin}}{R_\text{shunt}} \cdot \frac{1}{r_\text{diffOpAmp}\cdot r_\text{OpAmp}} = I_\text{48V IN}
\end{align}

\subsection{9.6V Output Voltage}
This Circuit consists of a a simple 1:4 Voltage Divider.

\begin{figure}[H]
    \centering

    \resizebox{.55\columnwidth}{.12\paperheight}{%
        \begin{circuitikz}[scale=2]
            \draw[color=black, thick]

            (0,0) node[left]{GND}
            to [short, o-] (1,0)
            to [R, l_={R1 1k}] (1,1)

            (0,2) node[left]{9.6V}
            to [short, o-] (1,2)
            to [R, l={R2 3k}] (1,1)
            to [short, *-] (3, 1) node[right, draw=black] {MONITOR\_10V};
        \end{circuitikz}
    }

\end{figure}

And the following equation shows that:
\begin{align}
    V_\text{10V PIN} = \frac{V_\text{10V IN} \cdot R_1}{R_1 + R_2}
\end{align}


\subsection{1.8V Output Voltage}

until now the voltages and current could only be measured, now the mechanism for setting a resulting Voltage at the 1.8V Terminals is known. \autoref{fig:gen18v} is the circuit for generating 1.8V, it consists of a power module and a resulting resistance at given pind, defined by R$_\text{series}$, R$_\text{parallel}$ and R$_{pot}$, whose job is to set the output to a given voltage of around 1.8V, but we can vary R$_\text{pot}$, because this resistance is set vie a digital potentiometer.
\begin{figure}[t]
    \centering
    \includegraphics[width=.55\textwidth]{./tikz/gen18v.pdf}
    \caption{Circuit for generating a changable Output Voltage, consisting of the DC-DC Converter, a resistor chain, supply voltage (left) and resulting voltage (right)}%
    \label{fig:gen18v}
\end{figure}

The in \autoref{fig:gen18v} used 1.8V Converters have a characteristic formual~\cite{pth08t}, and the in this circuit used Potentiometer  is a linear 10k$\Omega$ Rheostat resulting in the following equations:

\begin{align}
    R_{potentiometer} =& P_{val} \frac{10k\Omega}{256} \label{eq:rpot}\\
    R_{SET} =& 1 / \left(\frac{1}{R_{potentiometer}} + \frac{1}{R_{parallel}}\right) + R_{series}\nonumber\\
    =& \frac{R_\text{potentiometer}\cdot R_\text{parallel}}{R_\text{potentiometer} + R_\text{parallel}} + R_\text{series}\label{eq:rset}\\
    V_O =& \frac{30.1 k\Omega}{R_{SET} + 6.49 k\Omega} \cdot 0.7V + 0.7V\label{eq:vout}
\end{align}

This equation is in contrast to all previous behavior models not of a linear nature but proportional to $\frac1x$ as visualized in \autoref{fig:beh1v8}

\begin{figure}[H]
    \centering
    \hspace*{-.165\textwidth}
    \includegraphics[width=1.3\textwidth]{./data/theory/v18.pdf}
    \caption{Expected bahavior of our output voltage by setting the potentiometer}%
    \label{fig:beh1v8}
\end{figure}
\subsection{1.8V Output Current}
The circuit for measuring current is also quite straight forward. It consists of a current sensing IC, which is Hall sensor based, and is in series with the wafer connection. One each for digital and analog.

\begin{figure}[H]
    \centering

    \resizebox{.55\columnwidth}{.12\paperheight}{%
        \begin{circuitikz}[scale=2]
            \draw[color=black, thick]

            (0,0) node[left]{GND}
            to [short, o-] (1,0)
            to [] (1,.5)

            (0,2) node[left]{1.8V}
            to [short, o-] (1,2)
            to [] (1,1.5)

            (1.2,1) node[draw=black, regular polygon, regular polygon sides=4, minimum size=2.7cm]{amc}

            (1.7,1)
            to [short, *-] (3, 1) node[right, draw=black] {VDD\_1V8\_};
        \end{circuitikz}
    }

\end{figure}

\section{ADC Calibration}

As mentioned beforehand, the actual hardware will differ in behavior from its theoretical counterpart. These discrepancies will in fact differ by more than we can accept and use without countermeasures. Therefore we can say that all signals with a signoficant difference of behavior ($\approx 5\%$) will need to be corrected.

To calibrate these readouts we need to employ some simple actions.

\subsection{serial ADC readout}
While the measurements done by the STM32-Chip are using a 12bit ADC, there are not enough of these inside the chip to be able to completely parallelize the measurements, so only one ADC will be switching between all connected pins. This Behavior can be problematic in regards to measuring accurately. The timing used to measure a single line can be programmatically set from 3 up to 480 clock ticks\footnote{this clock is the internal adc clock, with a frequency of }

\section{1.8V Output Regulation}
For Regulting the Output the method used is a numerical one, we calculate the voltage wanted at the putpu terminal and then we calculate a potentiometer setting, which changes the voltage produced (see \autoref{fig:gen18v}).
The second part is already done beforehand and then available as lookup table to the firmware. On the other hand, to calculate the voltage to ouput, it is necessary to classify the connections between the PowerIts ouput terminals and the reticle.

\subsection{Power Wafer}
To test the 1.8V Regulation the so called Power Wafer is going to be used, it bahves similarly to a in BrainScales used ``fuctional'' Wafer module. But it is fundamentally different, as it cannot be used for computation, but only to test for voltages and currents. Its internals behave like switchable ohmic resistors, which provides us with a maximum powerdraw per Reticle of what is possible inside a usable wafer module.

\begin{figure}[H]
    \centering
    \includegraphics[width=.8\columnwidth]{./data/theory/wafer.pdf}
    \caption{reticle diagram of a wafer in BrainScaleS, orientation as used in software and to better visualize connections on the wafer. All 48 Reticles are shown, all numbered from top left to bottom right}%
    \label{fig:wafer}
\end{figure}

\begin{figure}[H]
    \centering
    \includegraphics[width=.7\columnwidth]{./pics/waferpcb.png}
    \caption{part of the mainpcb on which a wafer is placed, in its realworld orientation (rotated 45° from \autoref{fig:wafer}), visible are the 48 Reticles and two terminals each for 1.8V Digital (blue) and Analog (red)}%
    \label{fig:mainpcb}
\end{figure}

It has the same layout as its system counterparts and each of the 48 Reticles can be accessed, digitaly as well as electricaly.
Each Reticle is connected to its corresponding CURE Board, which can read voltages of each reticle, right after the PowerFETs, reponsible for switching on power to a Reticle (switches in \autoref{fig:retmodel})

Another specialization of the Power wafer is, that all reticles voltages are connected directly to pins on the Analog Readout Boards~\cite{anabpower}. There it is possible to measure a voltage, which is the one after the load resistors in \autoref{fig:retmodel}

\subsection{Simple Wafer Resistance Model (SWRM)}

The circuit in \autoref{fig:retmodel} can be used, as a first step, to describe the connections powering Reticles inside a wafer.

\begin{figure}[H]
    \centering
    \includegraphics[width=.4\columnwidth]{./tikz/reticlepower.pdf}
    \caption{model of the to measure resistances and their currents, $R_0$ describes the resistance of a connection between the PowerIt Output and up to the FET, while $R_1$ is a Resistance between FET and Reticles. The measurement is done between Output Terminals on the PowerIt and pins on a Analog readout board}%
    \label{fig:retmodel}
\end{figure}

SWRM allowes for two fixed resistance values and their respective currents. The current flowing through $R_1$ will be either 0 or a constant current $I_{ret}$. The current through $R_0$ will change depending on the number of reticles that are powered $n_{ret}$

\begin{align}
    I_{ges} = n_{ret} \cdot I_{ret}
\end{align}

Therefore the voltage Differential as measured by a Voltmeter (see \autoref{fig:retmodel}) can be described with \autoref{eq:vdip}

\begin{align} \label{eq:vdip}
    V_{dip} =&\ V_{R_1} + V_{R_0} \nonumber\\
            =&\ R_1 \cdot I_{ret} + R_0 \cdot I_{ges} \nonumber\\
            =&\ I_{ret} \cdot \left( R_1 + R_0 \cdot n_{ret} \right)
\end{align}

Combining Equations~\ref{eq:rpot},~\ref{eq:rset}, and~\ref{eq:vout}, we gather \autoref{eq:fullreg}. This equation is a reversed function of the one used in \autoref{fig:gen18v}

\begin{align} \label{eq:fullreg}
    P_{val} = \frac{%
        R_{par} \left[ \left( \frac{0.7V \cdot 30.1k\Omega}{V_{O}-0.7V} - 6.49k\Omega \right) - R_{ser}\right]
    }{%
        R_{par} + \left( \frac{0.7V \cdot 30.1k\Omega}{V_{O}-0.7V} - 6.49k\Omega \right) - R_{ser}
    }\cdot
    \frac{256}{10k\Omega}
\end{align}

inside the code used for Regulation, \autoref{eq:fullreg} will be used to create a lookup table, while \autoref{eq:vout2} will be used at runtime, for which \autoref{eq:vdip} and~\ref{eq:voff} are needed.

\begin{align} \label{eq:voff}
    V_{dip} =& V_O - V_{off}\\
    \Rightarrow V_O =& I_{ret} \cdot \left( R_1 + R_0 \cdot n_{ret} \right) + V{off}\label{eq:vout2}
\end{align}


\subsection{Distance Wafer Resistance Model}

Although the through SWRM gained functions are useful for determinig a theoretical Regulation procedure, it is still not near the realworld scenario.
In a wafer, the distance between reticles and voltage connector (see \autoref{fig:mainpcb}) are resulting in additional resistance, proportionally.

Therefore we adapt the DWRM after Circuit~\ref{fig:retmodelshell} in which each different Distance requires additional Resistors.

\begin{figure}[H]
    \centering
    \includegraphics[width=.5\columnwidth]{tikz/reticlepower_2}
    \caption{retpow2}%
    \label{fig:retmodelshell}
\end{figure}

With this model the voltage is now expected to change depending on the reticles distance instead of being the same. The distances inside a wafer are visualized in \autoref{fig:retmodelrdist}

\begin{figure}[H]
    \centering
    \includegraphics[width=\columnwidth]{../pitstop/20180809/reticel_rtheo.pdf}
    \caption{Distances of reticles to the nearest voltage suppling connection for DWRM, distance is in reticle-side length}%
    \label{fig:retmodelrdist}
\end{figure}
