%! TEX root ../thesis.tex
\begin{figure}[H]
    \centering
    \begin{tabular}{l|>{\ttfamily}l l l l}
        \bfseries{addr} & \textnormal{\bfseries{name}} & \bfseries{type} & \bfseries{size} & \bfseries{perm} \\
        \hline
        0x00 & onmask               & byte      & 1  & rw\\
        0x01 & offmask              & byte      & 1  & rw\\
        0x02 & anapot               & 9bit      & 2  & rw\\
        0x04 & digipot              & 9bit      & 2  & rw\\
        \hline
        0x06 & polyFit.V48          & float arr & 12 & rw\\
        0x12 & polyFit.I48          & float arr & 12 & rw\\
        0x1e & polyFit.V8           & float arr & 12 & rw\\
        0x2a & polyFit.V18          & float arr & 12 & rw\\
        0x36 & polyFit.I18          & float arr & 12 & rw\\
        0x42 & polyFit.T            & float arr & 12 & rw\\
        \hline
        0x42 & sampleTicks          & byte      & 1  & rw\\
        \hline
        0x43 & TEMP\_SENSOR         & float     & 4  & r\\
        0x47 & EXT\_AIN             & float     & 4  & r\\
        0x4b & MONITOR\_48V         & float     & 4  & r\\
        0x4f & MONITOR\_48I         & float     & 4  & r\\
        0x53 & MONITOR\_8VBUS       & float     & 4  & r\\
        0x57 & MONITOR\_8IBUS       & float     & 4  & r\\
        0x5b & MONITOR\_8V\_0       & float     & 4  & r\\
        0x5f & MONITOR\_8V\_1       & float     & 4  & r\\
        0x63 & MONITOR\_8V\_2       & float     & 4  & r\\
        0x67 & MONITOR\_8V\_3       & float     & 4  & r\\
        0x6b & VDD\_1V8\_ANA        & float     & 4  & r\\
        0x6f & VDD\_1V8\_IOUT\_ANA  & float     & 4  & r\\
        0x73 & VDD\_1V8\_DIGI       & float     & 4  & r\\
        0x77 & VDD\_1V8\_IOUT\_DIGI & float     & 4  & r\\
        \hline
        0x7b & CommitHash           & float     & 4  & s\\
        0x7f & CommitDirtyFlag      & byte      & 1  & s\\
        0x80 & STM32UUID            & 96bit     & 12 & s\\
    \end{tabular}
    \caption{memory mapping of the packed struct moved over i2c}
\end{figure}
