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update README with progress, correct theory, add some info

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acereca 2018-07-02 10:15:13 +02:00
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14
README.md
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@ -28,9 +28,10 @@
- missing `__attribute__((packed))` declarations
- [x] why are `digipoti` and `anapoti` only readable from `0x02` and `0x04` not partial?
- same as above
- [ ] instability on mass spi communication
- [ ] instability on mass communication
- timebased / overflow ?
- gdb-server feasable?
-> most likely race-condition on writing any value to (semi-)global objects
- gdb-server feasable? -> NO: only 6 registers for breakpoints and no stacktrace
- Calibration
- [x] characterize adcbehaviour
@ -49,7 +50,7 @@
- [x] differences between PIts?
- if yes then we need a `PITDB` -> `pitdb.yaml`
- standard only for default
- [ ] ADC vs. Keithley
- [ ] Voltage
- [x] redo after selection of `sampleTicks` value
- [x] 48V
- [ ] 10V
@ -58,11 +59,12 @@
- [ ] calibrate based on fit
- [ ] 48V
- [ ] 10V
- [ ] 1.8V
- [ ] 1.8V ana
- [ ] 1.8V digi
- [ ] Current
- [ ] without calib
- [x] 48I
- [ ] 1.8I ana
- [x] 1.8I ana
- [ ] 1.8I digi
- [ ] with calib
- [ ] 48I
@ -77,9 +79,11 @@
- 1.8V Regulation
- [ ] compare regulation concepts
- there's overshoot: less oscillation is good, as long as we don't take forever to achieve those
- [ ] stabilize
- [ ] regulate the system (with missing information)
- (possibility: unused reticles on each wafer can be used to get some feedback on initial calibration, would result into additional dynamic values for calculation and calibration o fthe 1.8V regulation)
- [ ] write / formulate approach and resulting formula / algorithm
## Table of Contents

2
data/sshfs.sh
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@ -1 +1 @@
sshfs hbpc9:. afshome
mountpoint ~/gitlab/BaTh/data/afshome || sshfs hbpc9:. ~/gitlab/BaTh/data/afshome

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data/theory/i48.pdf
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data/theory/mktheory.py
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@ -31,8 +31,8 @@ def gen_48i_theory():
plt.savefig('i48.pdf')
def gen_1v8_theory():
rpara = 1000
rseri = 10000
rpara = 75000
rseri = 2*4700
xdata = np.arange(0, 256, 4)
ydata = (xdata / 256 * 10000)
ydata = ydata * rpara / (ydata + rpara) + rseri
@ -50,4 +50,4 @@ def gen_1v8_theory():
if __name__ == "__main__":
gen_48v_theory()
gen_48i_theory()
gen_1v8_theory()
gen_1v8_theory()

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data/theory/v18.pdf
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data/theory/v48.pdf
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82
parts/experiments.tex
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@ -4,28 +4,37 @@
\section{Characterization}
\subsection{sampling time}
The first experiment needed to run was fo selecting an optimal number of cycles for which the adc will probe the to it at that moment connected pin.
In this case the uncalibrated measurement of our input voltage was taken as example, and repeated with each of the possible 8 settings of the in Firmware used value.
The resulting errors can be seen in figures \ref{sampleticks1} and \ref{sampleticks2}
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180529.pdf}
\caption{plotted difference from set input voltage, and fitted linearly, May 29th 2018, $\approx$32\si\degree C}
\label{sampleticks1}
\end{figure}
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180530.pdf}
\caption{plotted difference from set input voltage, and fitted linearly, May 30th 2018, $\approx$25\si\degree C}
\label{sampleticks2}
\end{figure}
\subsection{Voltages}
\subsubsection{48V Input}
\begin{figure}
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180529.pdf}
\caption{plotted difference from set input voltage, and fitted linearly, May 29th 2018, $\approx$32\si\degree C}
\end{figure}
\begin{figure}
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180530.pdf}
\caption{plotted difference from set input voltage, and fitted linearly, May 30th 2018, $\approx$25\si\degree C}
\end{figure}
\subsubsection{9.6V Output}
\subsubsection{1.8V Output}
\begin{figure}[h]
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/m02_adccalib_48/adccalib_v18ana.pdf}
@ -45,27 +54,44 @@
\subsubsection{48V Input}
\begin{figure}[h]
\centering
\includegraphics[width=\textwidth]{../pitstop/20180619/i48.pdf}
\caption{Calibration of input current adcs 19.06.2018}
\label{}
\end{figure}
\begin{figure}[h]
%TODO: 19.6 and 20.6 unusable
% \begin{figure}[h]
% \centering
% \includegraphics[width=\textwidth]{../pitstop/20180619/i48.pdf}
% \caption{Calibration of input current adcs 19.06.2018}
% \label{}
% \end{figure}
% \begin{figure}[h]
% \centering
% \hspace*{-.16\columnwidth}
% \includegraphics[width=1.3\columnwidth]{../pitstop/20180620/i48.pdf}
% \caption{Calibration of input current adcs 20.06.2018}
% \label{}
% \end{figure}
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180620/i48.pdf}
\caption{Calibration of input current adcs 20.06.2018}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180621/i48.pdf}
\caption{Calibration of input current adcs 21.06.2018}
\label{}
\end{figure}
\subsubsection{9.6V Output}
\subsubsection{1.8V Output}
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180629/i18ana_nocalib.pdf}
\caption{Pre Calibration Measurement of Output Current at the 1.8V Analog Terminal (29.06.2018)}
\label{precalib18iana}
\end{figure}
\section{after Calibration}
\inputminted{yaml}{../pitstop/pitdb.yaml}
\subsection{Voltages}
\subsubsection{48V Input}
@ -81,9 +107,19 @@
\subsubsection{9.6V Output}
\subsubsection{1.8V Output}
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180629/i18ana_postcalib.pdf}
\caption{Post Calibration Measurement of Output Current at the 1.8V Analog Terminal (29.06.2018}
\label{postcalib18iana}
\end{figure}
\section{1.8V Regulation}
\subsection{Characterization of Dropoff}
\subsection{after <METHOD>-Correction}
\section{Pitfalls}

2
parts/intro.tex
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@ -29,7 +29,7 @@ The hardware used in this thesis is a PowerIt board (fig. \ref{}), developed in
In which it is providing the Wafer with 1.8V and the FPGAs with 9.6V. Its maximum rated Pwerdraw is 2kW.
\cite{poweritupgrade}
%TODO: fix cite \cite{poweritpgrade}
<containing intro to system and board>

42
parts/theory.tex
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@ -6,7 +6,7 @@
Before starting any experimental data acquisition, some theory needs to be discussed.
Mainly the conceptual behavior of the onboard measurement circuitry.
\subsection{48V Input Voltage}
\begin{figure}[h]
\begin{figure}[H]
\centering
\includegraphics[width=.9\textwidth]{./tikz/mon48v.pdf}
\caption{Circuit for measuring the 48V input Voltage, consisting of input potential, two resistors as voltage divider, one full differential operational amplifier (full Diff Op Amp), one operational Amplifier, output voltage as well as the connection to the STM32-Chips input pin}
@ -28,19 +28,19 @@ This circuit results in the following equation:
V_\text{48V in}\cdot\frac{R_1}{R_1+R_2} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} = V_\text{48V pin}
\end{equation}
and the expected behavior, as seen in \ref{beh48v}
\begin{figure}[h]
\centering
\hspace*{-.16\textwidth}
\includegraphics[width=1.3\textwidth]{./data/theory/v48.pdf}
\caption{Expected behavior of our 48V measurement circuit}
\label{beh48v}
\end{figure}
% and the expected behavior, as seen in \ref{beh48v}
%
% \begin{figure}[h]
% \centering
% \hspace*{-.16\textwidth}
% \includegraphics[width=1.3\textwidth]{./data/theory/v48.pdf}
% \caption{Expected behavior of our 48V measurement circuit}
% \label{beh48v}
% \end{figure}
\subsection{48V Input Current}
\begin{figure}[h]
\begin{figure}[H]
\centering
\includegraphics[width=.9\textwidth]{./tikz/mon48i.pdf}
\caption{Circuit for measuring the 48V input Current, consisting of the powerit Input Circuit, one shunt-resistor, one full diff Op Amp, one Op Amp, output potential, as well as the connection to the STM32-Chip input pin}
@ -58,14 +58,14 @@ Our calculation is based on:
I_\text{48V IN}\cdot R_{shunt} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} = V_\text{48I pin}
\end{equation}
so we expect:
\begin{figure}[h]
\centering
\caption{Expected behavior of our input current measurement circuit}
\hspace*{-.16\textwidth}
\includegraphics[width=1.3\textwidth]{./data/theory/i48.pdf}
\label{beh48i}
\end{figure}
% so we expect:
% \begin{figure}[h]
% \centering
% \caption{Expected behavior of our input current measurement circuit}
% \hspace*{-.16\textwidth}
% \includegraphics[width=1.3\textwidth]{./data/theory/i48.pdf}
% \label{beh48i}
% \end{figure}
\subsection{9.6V Output Voltage}
@ -77,14 +77,14 @@ so we expect:
V_O =& \frac{30.1 k\Omega}{R_{SET} + 6.49 k\Omega} \cdot 0.7V + 0.7V
\end{align}
\begin{figure}[h]
\begin{figure}[H]
\centering
\includegraphics[width=.7\textwidth]{./tikz/gen18v.pdf}
\caption{Circuit for generating a changable Output Voltage}
\label{gen18v}
\end{figure}
\begin{figure}[h]
\begin{figure}[H]
\centering
\hspace*{-.13\textwidth}
\includegraphics[width=1.3\textwidth]{./data/theory/v18.pdf}

2
thesis.tex
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@ -26,5 +26,5 @@
\include{parts/outlook}
\bibliographystyle{ieeetr}
\bibliography{ubib/ubib}{}
\bibliography{../../github/ubib/ubib.bib}
\end{document}