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%! TEX root = ../thesis.tex
\chapter{Appendix - Firmware}
\section{Virtual Memory Mapping}
THe biggest Change done to the Firmware was the implemetation of a new communication protocoll.
This protocoll uses the following table as reference
\begin{figure}
\centering
\input{./tabs/registerbuffer}
\caption{}%
\label{registerbuffer}
\end{figure}
\section{How to calibrate a PowerIt Board}
The Calibration process is based on the PItSTOP Python scripts\footnote{
% TODO: insert repo, and link to docs
\href{https://acereca.ddns.net:11443/acereca/pitstop}{PItSTOP Repo}
}.
These are split into \verb|server| and \verb|aggregator|. While the Server is handling the translation between raw I$^2$C data, and the JSON formatted result, the Aggregator takes this JSON and calculates a calibration.
Using the script any one of the following Values can be tested and calibrated:
\begin{itemize}
\item Input Voltage (\verb|pitstop.Aggregator.test_v_48()|)
\item Input Current (\verb|pitstop.Aggregator.test_i_48()|)
\item 9.6V Output Voltage (\verb|pitstop.Aggregator.test_v_10()|)
\item 1.8V Output Voltage (\verb|pitstop.Aggregator.test_v_18()|)
\item 1.8V Output Current (\verb|pitstop.Aggregator.test_i_18()|)
\end{itemize}
\subsection{Setting up the Test Environment}
The simplest way to setup an environment consists of cloning the PItSTOP project on a client:
\begin{mintylst}{bash}
> git clone https://url.to.pitstop
\end{mintylst}
then substituting the \verb|rsync| target:
\begin{mintylst}[label={makefile}]{makefile}
all:
rsync --progress ./*.py /remote.url/
\end{mintylst}
, to be your server (should be a RaspberyyPi connected to the PowerIt)
\subsection{Running a Test}
Runnig the test requires the following commands
\\
Serverside:
\begin{mintylst}{bash}
> python server.py
\end{mintylst}
Clientside:
\begin{mintylst}{bash}
> python aggregator.py
\end{mintylst}
Now just following the instructions given, the selected test can be run:
\begin{mintylst}{text}
Setting up calibration test for {}
Please be sure to:
- connect the {} to the RaspberryPi running server.py.
- connect the PowerIt to the RaspberyPi as described in the documentation
- and be sure to connect the {} to the {} Terminal.
Continue (y/N): y
What is the Name given to the connected PowerIt? [Bxx]: B05
\end{mintylst}
The result will consist of two diagrams one without calibration and one with.
It will also write the newly obtained calibration data into \verb|pitdb.yaml|

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@ -67,7 +67,8 @@ The first experiments to run are the characterization of hardware behavior. Thes
\centering
\hspace*{-.175\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180529.pdf}
\caption{up: input difference from set voltage vs set voltage for different possible scaler values; down: gain error of the linear fitted curves vs set scaler value (May 29th 2018, $\approx$32\si\degree C)}%
\caption{Top: input difference from set voltage vs set voltage for different possible scaler values.
Bottom: gain error of the linear fitted curves vs set scaler value (May 29th 2018, $\approx$32\si\degree C)}%
\label{sampleticks1}
\end{figure}
@ -91,33 +92,51 @@ The first experiments to run are the characterization of hardware behavior. Thes
Note, that measurements are expected to be less accurate, the more components are contained in their respective measurement circuit. Because small errors will accumulate and in e.g. the case of 48V's be amplified by a factor of 8.
\subsubsection{48V Input}
When looking at calibrating the input voltage (\autoref{v48_precalib}), we can clearly see a relatively constant offset of $\approx$1V.
In \autoref{v48_precalib} a polynomial fit of 2nd degree\footnote{A Fit of second degree will be used in the complete calibration process} is done and its coefficients extracted (\autoref{pitdb}, line 9).
These coefficients not only show an offset, but also some deviation in the incline and curve from the default values.
\begin{figure}[H]
\centering
\vspace{-1cm}
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180821/calib_v48.pdf}
\caption{Calibration of input voltage, plotted are a external measurement and internal values, vs the recalculated pin voltage based on the internal value and used default function (default coefficients see \autoref{pitdb-example})}%
\includegraphics[width=1.3\columnwidth]{../pitstop/20180824/calib_v48.pdf}
\vspace{-1cm}
\caption{
Calibration of \SI{48}{\volt} input voltage.
Plotted are measured and reference vs the calculated vin voltage.
The Calibration sweeps from \SIrange{43.2}{52.8}{\volt}.
The fit is of second degree and its inverse are the to use calibration coefficients.
(fit:{\(
\pyval{poly48v2}V_\text{IN}^2+\pyval{poly48v1}V_\text{IN}+\pyval{poly48v0}=V_\text{MONITOR\_48V}
\)})}%
\label{v48_precalib}
\end{figure}
When looking at calibrating the input voltage (\autoref{v48_precalib}), we can clearly see a relatively constant offset of $\approx$1V.
In \autoref{v48_precalib} a polynomial fit of 2nd degree\footnote{A Fit of second degree will be used in the complete calibration process} is done and its coefficients extracted (\autoref{pitdb}, line 9).
These coefficients not only show an offset, but also some deviation in the incline and curve from the default values.
\subsubsection{9.6V Output}
\subsubsection{9.6V Output}
The 9.6V Calibration, in contrast, shows only a slight deviation of the internal values and the reference measurement, which results in a list of coefficients (\autoref{
%TODO:
}, line 7), very similar to those set in the theoretical defaults.
\begin{figure}[H]
\centering
\vspace{-1cm}
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180821/calib_v10.pdf}
\caption{Calibration of 9.6V output Voltage, plotted are an external measurement and internal values vs the recalculated pin voltage based on the default coefficients (\autoref{pitdb-example})}%
\includegraphics[width=1.3\columnwidth]{../pitstop/20180824/calib_v10.pdf}
\vspace{-1cm}
\caption{%
Calibration of \SI{9.6}{\volt} input voltage.
Plotted are measured and reference vs the calculated vin voltage.
The Calibration sweeps from \SIrange{43.2}{52.8}{\volt}, and the supply mudules divide that into \SIrange{8.64}{10.56}{\volt}.
The fit is of second degree and its inverse are the to use calibration coefficients.
(fit:{\(
\pyval{poly10v2}V_\text{10V}^2+\pyval{poly10v1}V_\text{10V}+\pyval{poly1v0}=V_\text{MONITOR\_10V}
\)})}%
\label{v10_precalib}
\end{figure}
The 9.6V Calibration, in contrast, shows only a slight deviation of the internal values and the reference measurement, which results in a list of coefficients (\autoref{}, line 7), very similar to those set in the theoretical defaults.
This small difference is explained by the simple voltage division used as our circuitry, and no amplification, as for the input voltage circuit.
\subsubsection{1.8V Output}
@ -138,60 +157,90 @@ The first experiments to run are the characterization of hardware behavior. Thes
\subsection{Currents}
With now calibrated Voltages, the next step is to measure the behavior of the measuring circuits.
Note that the 9.6V Output does in fact not have a include circuit for measuring its current draw, and that this number will be obtainable from all other (calibrated) measurements.
With now calibrated Voltages, the next step is to measure the behavior of the current measuring circuits.
Note that the 9.6V Output does in fact not have a include circuit for measuring its current draw, and that this number will be obtainable from all other (calibrated) measurements.
\subsubsection{48V Input}
This experiment will calibrate the 48V input current.
In it the current drawn by the PowerIt sweeps over a range from \SIrange{0}{20}{\ampere}.
In \autoref{fig:calib48i} quite a gap between observed and measured values can be seen.
This is most likely a gain error, which would result in a error in \(m_2\), as observed.
And the fitted curve has the following parameters:
\begin{align}
V_\text{MONITOR\_48I} =&~m_0 + m_1\cdot I_\text{IN} + m_2\cdot I_\text{IN}^2\\
m_0 =&~\pyval{poly48i0}\nonumber\\
m_1 =&~\pyval{poly48i1}\nonumber\\
m_2 =&~\pyval{poly48i2}\nonumber
\end{align}
from which the inverse will used for calibration inside the PowerIt.
\begin{figure}[H]
\centering
\vspace{-1cm}
\hspace*{-.16\columnwidth}
%TODO: transparent
%\vspace{-1cm}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180821/calib_i48.pdf}
\caption{Calibration of input current ADCs 21.06.2018}
\label{}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180824/calib_i48.pdf}
\vspace{-1cm}
\caption{%
Calibration of \SI{48}{\volt} input current.
Plotted are measured and reference current vs the calculated pin voltage.
The Calibration sweeps over \SIrange{0}{20}{\ampere}.
The fit is of second degree and its inverse are the to use calibration coefficients.
}%
\label{fig:calib48i}
\end{figure}
\subsubsection{1.8V Output}
For the calibration experiment of both 1.8V output currents, the current draw ranged from \SIrange{0}{90}{\ampere}.
Observed were the values in \autoref{precalib18i}.
Visible is a different incline of internal measurement and reference.
\begin{figure}[H]
\centering
\hspace*{-.15\columnwidth}
%TODO: transparent
%\vspace{-1cm}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180821/calib_i18.pdf}
\caption{Pre Calibration Measurement of Output Current at the 1.8V Analog and Digital Terminal (2.7.2018)}
\label{precalib18iana}
\vspace{-1cm}
\hspace*{-.165\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180824/calib_i18.pdf}
\vspace{-1cm}
\caption{%
Calibration of \SI{1.8}{\volt} output current for both digital and analog.
Plotted are measured and reference current vs the calculated pin voltage.
The Calibration sweeps over \SIrange{0}{90}{\ampere}.
The fits are of second degree and their inverse are the to use calibration coefficients.
}%
\label{precalib18i}
\end{figure}
The fitted curve for the analog side were:
\begin{align}
V_\text{MONITOR\_1I8\_ANA} =&~m_0 + m_1 \cdot I_\text{1.8V, ana} + m_2 \cdot I_\text{1.8V, ana}^2\\
m_0 =&~\pyval{poly18iana0}\nonumber\\
m_1 =&~\pyval{poly18iana1}\nonumber\\
m_2 =&~\pyval{poly18iana2}\nonumber
\end{align}
, while the digital side had quite similar values of:
\begin{align}
V_\text{MONITOR\_1I8\_DIGI} =&~m_0 + m_1 \cdot I_\text{1.8V, digi} + m_2 \cdot I_\text{1.8V, digi}^2\\
m_0 =&~\pyval{poly18idigi0}\nonumber\\
m_1 =&~\pyval{poly18idigi1}\nonumber\\
m_2 =&~\pyval{poly18idigi2}\nonumber
\end{align}
%\section{after Calibration}
% \subsubsection{9.6V Output}
% \subsubsection{1.8V Output}
%\subsection{Currents}
% \subsubsection{48V Input}
% \subsubsection{9.6V Output}
% \subsubsection{1.8V Output}
% \begin{figure}[H]
% \centering
% \hspace*{-.16\columnwidth}
% \includegraphics[width=1.3\columnwidth]{./pitstop/20180702/i18ana_postcalib.pdf}
% \caption{Post Calibration Measurement of Output Current at the 1.8V Analog Terminal (29.06.2018}
% \label{postcalib18iana}
% \end{figure}
This also show, that both parts are so similar in bahavior, that a single sides observations would have sufficed.
\section{1.8V Regulation}
As Described beforehand the Output Voltages for both analog and digital can be adjusted to some degree and therefore we can compensate for the dropoff occurring between PowerIt Output Terminals and Reticles.
To run any test with the PowerWafer, the patterns in \autoref{fig:wpattern} were used.
Tere are two reasons for that, firstly these patterns distribute the current draw in a regular fashion as to distribute the load between the connectors.
Secondly, when powering Reticles all of the energy is converted into heat, via the ohmic resistors.
\begin{figure}[H]
\centering
\includegraphics[width=\columnwidth]{./data/theory/wpattern.pdf}
@ -199,21 +248,25 @@ As Described beforehand the Output Voltages for both analog and digital can be a
\label{fig:wpattern}
\end{figure}
And although the copper heat sink and fans (see \autoref{fig:expsetup2}), should be able to handle this heat in theory, when grouping together reticles and powering them, the dissipation does not suffice.
The internal temperature probes (between heatsink and wafer) register well above \SI{50}{\celsius}, when grouping 3 or more reticles.
\subsection{Characterization of Dropoff}
Wanting to observe and characterize the voltage drop, first the connections between PowerIt and Reticles can be measured with the in \autoref{fig:retmodel} described connections, which in actuality are the PowerIT Terminal and corresponding analog readout pin on a Analog readout board.
To use the PowerWafer for testing one of the patterns in \autoref{fig:wpattern} will be used, each pattern has a approximate current draw of 120A and will distribute heat and draw per terminal evenly.
In \autoref{1v8dip} a single reticles (40) Voltage Dip for different Current Draws is visualized.
In \autoref{1v8dip} a single reticles (\#40) voltage drop for different Current Draws is visualized.
A relatively linear trend and residuals of a trigonometric behavior can be observed (most likely the result of the inaccurately measurable current draw, which here is done inside the PowerIt).
\begin{figure}[H]
\centering
%\vspace*{-1cm}
\vspace*{-1.5cm}
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./pitstop/20180807/ret_vdip.pdf}
\caption{Voltage dip observed between PowerIt and HICANN, each point represents a state after enabling additional Reticles on the PowerWafer (right upper wafer in \autoref{fig:wpattern})}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180824/ret_vdip.pdf}
\vspace{-1cm}
\caption{Voltage drop observed between PowerIt and HICANN, each point represents a state after enabling additional Reticles on the PowerWafer (right upper wafer in \autoref{fig:wpattern})}
\label{1v8dip}
\end{figure}
@ -227,7 +280,7 @@ The initial idea, to approach the correction of this dropoff is a Numerical: the
To apply this approach, two assumptions need to be made:
\begin{itemize}
\item all reticles have the same current draw (already not accurate, see \autoref{1v8dip})
\item all reticles experience the same Voltage Dip (as observed for reticle 40)
\item all reticles experience the same voltage drop (as observed for reticle 40)
\end{itemize}
and the following four values are required, before a regulation can be attempted:
@ -270,11 +323,11 @@ To obtain \(R_0\), the pattern in \autoref{fig:wafer-ret5} was used to take meas
\vspace*{-1cm}
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180820/reticle_corr}
\caption{Voltage Dip vs current for both Reticles in direct neighborhood and farthest possible Reticles}%
\caption{Voltage drop vs current for both Reticles in direct neighborhood and farthest possible Reticles}%
\label{fig:ret5corr}
\end{figure}
From \autoref{fig:ret5corr} it is possible to see that the distance between reticles that are used gives different behavior of the Voltage Dip. Both Inclines happen to be the extreme cases, while either being completely uncorrelated, the case for farthest Reticles, or being directly correlated by their distance, here observable for the neighboring Reticles.
From \autoref{fig:ret5corr} it is possible to see that the distance between reticles that are used gives different behavior of the voltage drop. Both Inclines happen to be the extreme cases, while either being completely uncorrelated, the case for farthest Reticles, or being directly correlated by their distance, here observable for the neighboring Reticles.
Therefore we obtain two values for \(R_0\):
@ -298,23 +351,23 @@ So applying these Values, the following behavior for regulation can be visualize
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/theory/reg.pdf}
\caption{possible \(P_{val}\) curves after SWRM, dotted lines represent not achievable values}%
\caption{Possible \(P_{val}\) curves after SWRM, dotted lines represent not achievable values}%
\label{fig:regswrm}
\end{figure}
The in \autoref{fig:regswrm} visualized values show the theoretical \(P_{val}\) for the corresponding Current, while all dotted parts depict the values which would be needed to achieve full correction at the Reticle level.
Note that the 1.8V regulation, should fail at about 80A of current draw.
Now that the SWRM is applicable, what about the DWRM, which removes the assumption of a equal Voltage Dip per Reticle, applying an offset to the initially observed Voltage of each Reticle.
Now that the SWRM is applicable, what about the DWRM, which removes the assumption of a equal voltage drop per reticle, applying an offset to the initially observed voltage of each reticle.
To account for that, the Voltage Dip per Reticle, in a single Reticle power state, was observed:
To account for that, the voltage drop per reticle, in a single reticle power state, was observed:
\begin{figure}[H]
\centering
\vspace*{-1cm}
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180820/reticle_vdiphist.pdf}
\caption{initially observed Voltage Dip, Red values are ignored for corrected mean}%
\caption{Initially observed voltage drop, red values are ignored for corrected mean}%
\label{fig:vdiphist}
\end{figure}
@ -325,27 +378,35 @@ and a mean of:
can be observed.
\begin{figure}[t]
\centering
% \hspace*{-.15\columnwidth}
\includegraphics[width=.7\columnwidth]{../pitstop/20180815/reticel_rdist.pdf}
\caption{\(V_{dip}\) Distribution over full Power Wafer; White have no measurement; Red an Orange are marked red in \autoref{fig:vdiphist}}%
\label{fig:wrdist}
\end{figure}
\autoref{fig:wrdist} shows how those Voltages are Distributed over the complete PowerWafer.
All white Reticles are not measurable, and those colored in Red and Yellow are the outliers in \autoref{fig:vdiphist}. Note that in a deployed, working, Wafer System inside BrainScaleS the middle two Reticles (19 \& 28) are not used and also give grounds to ignoring the outliers.
This results in a distribution, which when combined with the spread of \(R_0\) from \autoref{fig:ret5corr}, gives an approximate range for all Reticles Voltage Dip at a given Current Draw (\autoref{fig:vrange}).
This results in a distribution, which when combined with the spread of \(R_0\) from \autoref{fig:ret5corr}, gives an approximate range for all reticles voltage drop at a given current draw (\autoref{fig:vrange}).
The last values that were measured, came from the CURE boards connected to each reticle.
The voltages obtined from these boards, can be compare to the manually obtained voltages vie AnaB pins.
In \autoref{fig:vcure40} these voltages are visualized, in comparison to the AnaB voltages.
\begin{figure}[H]
\centering
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180820/reticle_variance.pdf}
\caption{Experimentally obtained Voltage Ranges in which most Reticles Voltage Dip will lie, this does not include outliers}%
\label{fig:vrange}
\vspace{-1cm}
\includegraphics[width=.7\columnwidth]{../pitstop/20180825/reticel_rdist.pdf}
\vspace{-.5cm}
\caption{\(V_\text{drop}\) distribution over full Power Wafer; White have no measurement; Red an Orange are marked red in \autoref{fig:vdiphist}}%
\label{fig:wrdist}
\end{figure}
\begin{figure}[H]
\centering
\vspace{-1cm}
\includegraphics[width=.9\columnwidth]{../pitstop/20180825/reticle_vcure.pdf}
\vspace{-.7cm}
\caption{%
Qualitative comparison of AnaB and CURe measured voltage drop.
Colors indicate their respective relative values for each measurement.
White reticles have no measurement.
}%
\label{fig:vcure40}
\end{figure}
\section{Pitfalls} \label{sec:pitfalls}
This comparison shows no discernable relation between both measurements.
This could be the result of not correctly calibrated CURE boards, or at least hints to some problem with the measurement.

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@ -52,20 +52,25 @@
\section{Contents in Detail}
The first goal was to be able to change the calibration parameters.
While this can be done at compiletime, these changes are board specific.
While this can be done at compile time, these changes are board specific.
Therefore they either need to be changed, before compiling, which would require a compilation per board.
Or else the need to be able to change during runtime.
For mainly maintainability reasons the second way was choosen.
But these calibration changes could not be transferred to the PowerIt using the old communication protokol, referred to as PItCOMM version 1.
A updated protocol was needed and it had to be able to accept not only the beforementioned values, but also any additional information or configuration.
But these calibration changes could not be transferred to the PowerIt using the old communication protocol, referred to as PItCOMM version 1.
A updated protocol was needed and it had to be able to accept not only the before mentioned values, but also any additional information or configuration.
And while at it the protocol, now PItCOMM version 2, was made to be somewhat compliant with the SMBus specifications.
And while at it, the protocol, now PItCOMM version 2, was made to be somewhat compliant with the SMBus specifications.
This was accomplished with a virtual memory map, which maps every parameter to a specific location in a virtual memeory.
In this memory, any value which needed to be accessible, be it measurement, calibration or static board information, is mapped (see \autoref{registerbuffer}).
Whith this as foundation, the PowerIt could be calibrated.
And the calibration parameters were be stored in a database.
With this as foundation, the PowerIt could be calibrated.
The parameters obtained by the calibration proces were be stored in a database.
The Calibration characterizes the voltage measuring circuit, whose voltages are either coming into or leaving the PowerIt.
Lastly, with a now calibrated board, a power supplys behavior was observed and corrected for, with a regulation mechanism.
The same thing applies to the input and the \SI{9.6}{\volt} current measuring circuit.
Taking these calibrations as bais, the \SI{1.8}{\volt} power supplys' behavior could be observed.
Additionally the electrical behavior of actual hardware both static (no currents) and dynamic (changing currents) could be observed.
And with these measurements a model was applied and checked for fitting this situation.
Lastly some statements could be made about the complete hardwares bahavior and a first version of a regulation model could be implemented.

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@ -1,3 +1,26 @@
%! TEX root = ../thesis.tex
\chapter{Outlook}
All in all the set goals were achieved.
While all of the measurements could be calibrated they can still be fine tuned.
As shown in \autoref{fig:postcalib10v}, the error of a calibrated measurement is not quite minimal.
In the future it would be possible to make these even more accurate, either by using a different method for calculating, which is not based on second degree polynomials.
Or by further calibration, as mentioned in the results chapter.
The voltage distribution, as described in figures~\ref{fig:vdiphist} and~\ref{fig:wrdist}, was quantified and the SWRM could be used for creating a worst-case V\(_\text{drop}\) distribution as seen in \autoref{fig:reg}.
Therefore a first iteration of a usable regulation mechanism could be implemented and verified (see \autoref{fig:postreg}).
This mechanism allows for a certain degree of regulation until a current threshold is reachd.
This threshold was also agreeing with a beforehand calculated value of around \SI{80}{\ampere}
For further developing this the more complex DWRM could be used.
This would allow for a more accurate regulation, that would narrow down the worst-case scenario of \autoref{fig:reg}.
For that model to work, each experiment run on a wafer, in the system, would require a simulation of the distribution of voltage between the used reticles.
As to minimize the maximum difference in voltage drop.
This could also factor in the number of active HICANNs per reticle.
Additionally the current threshold is restricted by the internaly used resistor chain (described in \autoref{fig:gen18v}).
If the minimum resistance of that circuit were to be changed, the threshold would move up in current.

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@ -1,46 +1,60 @@
%! TEX root = ../thesis.tex
\chapter{Results}
This Chapter summaizes all of the resulting Workflow that has been developed during this Bachelor Thesis Work.
Mainly the Firmware Changes compared to the state at wich it was left off after the previously taken Internship \cite{poweritupgrade}
In this chapter all results from the experiments, as well as reasons will be discussed.
\section{Firmware}
The PowerIt Firmware was updated to allow for the Calibration Procedure (described in \ref{calib}) and the Rgulation of its 1.8V output. That resulted in a new Version of the I2C Protocol between the Monitoring System and PowerIts.
% \section{Firmware}
\subsection{PI2CProto v2}
The new Commmunication protocoll is based on the old one, and while the from the Host send Commands are compatible with version 1 the returned Message is not.
And just like in the old Version a Master can send a message to the PowerIt with the in the \verb|command_t| struct described structure:
% The PowerIt Firmware was updated to allow for the Calibration Procedure (described in \ref{calib}) and the Rgulation of its 1.8V output. That resulted in a new Version of the I2C Protocol between the Monitoring System and PowerIts.
\begin{mintylst}{cpp}
pi2c::command_t tosend { <crc>, 2, <CMD>, <optional_data0>, <optional_data1> };
\end{mintylst}
% \subsection{PI2CProto v2}
% The new Commmunication protocoll is based on the old one, and while the from the Host send Commands are compatible with version 1 the returned Message is not.
% And just like in the old Version a Master can send a message to the PowerIt with the in the \verb|command_t| struct described structure:
Here the \verb|<CMD>| can be \verb|CMD_SET| for setting a value in the corresponding table (fig. \ref{registerbuffer}), using \verb|<optional_data0>| as address and \verb|<optional_data1>| as value.
% \begin{mintylst}{cpp}
% pi2c::command_t tosend { <crc>, 2, <CMD>, <optional_data0>, <optional_data1> };
% \end{mintylst}
Reading a number of bytes from the table can be accomplished with \verb|CMD_READ|, giving the address to start and number of bytes in that order.
% Here the \verb|<CMD>| can be \verb|CMD_SET| for setting a value in the corresponding table (fig. \ref{registerbuffer}), using \verb|<optional_data0>| as address and \verb|<optional_data1>| as value.
While reading the complete Table is done with the \verb|CMD_READALL| command.
% Reading a number of bytes from the table can be accomplished with \verb|CMD_READ|, giving the address to start and number of bytes in that order.
THe \verb|<crc>| byte is the CRC8 value of all following bytes inside \verb|command_t|
% While reading the complete Table is done with the \verb|CMD_READALL| command.
\subsection{I2C mapped Register-Table}
When sending or reading values to or from the PowerIt, the address requireed is one of the 152 bytes documented in this table.
\input{./tabs/registerbuffer}
% THe \verb|<crc>| byte is the CRC8 value of all following bytes inside \verb|command_t|
% \subsection{I2C mapped Register-Table}
% When sending or reading values to or from the PowerIt, the address requireed is one of the 152 bytes documented in this table.
% \input{./tabs/registerbuffer}
\section{Calibration\label{calib}}
One of the goals of this Bachelor Thesis is to provide anyone required to calibrate a PowerIt Board with a comprehensive guide of, and inside into this process.
This calibration process yielded some workflows for use inside the system as well as calibration values for the used PowerIt.
\subsection{Calibration-Table}
\subsection{Calibration-Database}
Of important note is that al calibration values of each PowerIt can be mapped via the naming and uuid scheme provided either by the corresponding stickers or the STM32-Chips internal uuid (accessible through address \verb|0x8c|, see figure \ref{registerbuffer}).
There now also exists a global calibration Database, which will be loaded by the system on startup.
The obtained calibration values for the in these experiments used PowerIt, are combined in \autoref{pitdb}.
An example entry for each PowerIt entry looks like figure \ref{pitdb-example}
\begin{listing}[H]
\centering
\minty[%
minted options={lastline=10}%
]{yaml}{pitstop/pitdb.yaml}
\codecaption{
PITDB entry for B05 PowerIt.
\mintinline{cpp}{id} is obtained by the firmware and unique to each STM32Chip.
The \mintinline{cpp}{name} corresponds to the label on each PowerIt.
All \mintinline{cpp}{poly*} are all polynomial coefficients in order of 0th degree to 2nd degree.
}%
\label{pitdb}
\end{listing}
\begin{figure}[H]
\begin{mintyfig}[title={example entry of pitdb.yaml}, label=pitdb-example]{yaml}
And to compare, the values in \autoref{lst:pitdb-example} are theoretical values, obtained from all equations in \autoref{ch:theory}.
\begin{listing}[H]
\begin{mintyfig}[]{yaml}
---
uuid: 'default'
name: 'Bxx'
@ -51,78 +65,145 @@ An example entry for each PowerIt entry looks like figure \ref{pitdb-example}
poly48v: [0.0, 27.386, 0.0]
\end{mintyfig}
\end{figure}
\codecaption{%
Default PITDB entry for any PowerIt.
All \mintinline{cpp}{poly*} are all polynomial coefficients in order of 0th degree to 2nd degree.
}%
\label{lst:pitdb-example}
\end{listing}
\begin{figure}
\subsection{Accuracy}
To obtain an accuracy for the internal measurements, the experimental sweeps can be repeated after calibration.
One example of a calibrated measurement can be seen in \autoref{fig:postcalib10v}.
\begin{figure}[H]
\centering
\minty[minted options={lastline=10}, label=pitdb]{yaml}{pitstop/pitdb.yaml}
\vspace{-1.5cm}
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180825/postcalib_10v.pdf}
\vspace{-1cm}
\caption{%
Voltages after calibration.
Sweep from \SIrange{43.2}{52.8}{\volt} input voltage resulting in a range from \SIrange{8.64}{10.56}{\volt}.
The errors in the bottom diagram show the differences between reference and PIT values.
}%
\label{fig:postcalib10v}
\end{figure}
\subsection{How to calibrate a PowerIt Board}
This repeats the calibration measurement for \SI{9.6}{\volt}.
Here quite similar values can be observed, with a maximum \(\Delta V\) of around \SI{31.676}{\milli\volt}.
It is also possible to see a systematic error in \autoref{fig:postcalib10v}.
This error could be corrected, but requires quite some time investment.
It would allow for a reduction of \(\Delta V\), up to a value of \SI{24.456}{\milli\volt}.
The Calibration process is based on the PItSTOP Python scripts\footnote{
%TODO: insert repo, and link to docs
\href{https://acereca.ddns.net:11443/acereca/pitstop}{PItSTOP Repo}
}.
These are split into \verb|server| and \verb|aggregator|. While the Server is handling the translation between raw I$^2$C data, and the JSON formatted result, the Aggregator takes this JSON and calculates a calibration.
This result is similar to others, and for all it would be possisble to achieve a bit better fits.
Using the script any one of the following Values can be tested and calibrated:
\begin{itemize}
\item Input Voltage (\verb|pitstop.Aggregator.test_v_48()|)
\item Input Current (\verb|pitstop.Aggregator.test_i_48()|)
\item 9.6V Output Voltage (\verb|pitstop.Aggregator.test_v_10()|)
\item 1.8V Output Voltage (\verb|pitstop.Aggregator.test_v_18()|)
\item 1.8V Output Current (\verb|pitstop.Aggregator.test_i_18()|)
\end{itemize}
\subsubsection{Setting up the Test Environment}
The simplest way to setup your environment consists of cloning the PItSTOP Project onto your Client:
\begin{mintylst}{bash}
> git clone https://url.to.pitstop
\end{mintylst}
then substituting the \verb|rsync| target:
\begin{mintylst}[label={makefile}]{makefile}
all:
rsync --progress ./*.py /remote.url/
\end{mintylst}
, to be your server (should be a RaspberyyPi connected to the PowerIt)
\subsubsection{Running a Test}
Runnig the test requires the following commands
\\
Serverside:
\begin{mintylst}{bash}
> python server.py
\end{mintylst}
Clientside:
\begin{mintylst}{bash}
> python aggregator.py
\end{mintylst}
Now just following the instructions given, the selected test can be run:
\begin{mintylst}{text}
Setting up calibration test for {}
Please be sure to:
- connect the {} to the RaspberryPi running server.py.
- connect the PowerIt to the RaspberyyPi as described in the documentation
- and be sure to connect the {} to the {} Terminal.
Continue (y/N): y
What is the Name given to the connected PowerIt? [Bxx]: B05
\end{mintylst}
% \subsection{How to calibrate a PowerIt Board}
%
% The Calibration process is based on the PItSTOP Python scripts\footnote{
% TODO: insert repo, and link to docs
% \href{https://acereca.ddns.net:11443/acereca/pitstop}{PItSTOP Repo}
% }.
% These are split into \verb|server| and \verb|aggregator|. While the Server is handling the translation between raw I$^2$C data, and the JSON formatted result, the Aggregator takes this JSON and calculates a calibration.
%
% Using the script any one of the following Values can be tested and calibrated:
% \begin{itemize}
% \item Input Voltage (\verb|pitstop.Aggregator.test_v_48()|)
% \item Input Current (\verb|pitstop.Aggregator.test_i_48()|)
% \item 9.6V Output Voltage (\verb|pitstop.Aggregator.test_v_10()|)
% \item 1.8V Output Voltage (\verb|pitstop.Aggregator.test_v_18()|)
% \item 1.8V Output Current (\verb|pitstop.Aggregator.test_i_18()|)
% \end{itemize}
%
% \subsubsection{Setting up the Test Environment}
% The simplest way to setup your environment consists of cloning the PItSTOP Project onto your Client:
% \begin{mintylst}{bash}
%
% > git clone https://url.to.pitstop
%
% \end{mintylst}
% then substituting the \verb|rsync| target:
% \begin{mintylst}[label={makefile}]{makefile}
% all:
% rsync --progress ./*.py /remote.url/
% \end{mintylst}
%
% , to be your server (should be a RaspberyyPi connected to the PowerIt)
%
% \subsubsection{Running a Test}
% Runnig the test requires the following commands
% \\
% Serverside:
% \begin{mintylst}{bash}
% > python server.py
% \end{mintylst}
% Clientside:
% \begin{mintylst}{bash}
% > python aggregator.py
% \end{mintylst}
% Now just following the instructions given, the selected test can be run:
% \begin{mintylst}{text}
% Setting up calibration test for {}
% Please be sure to:
% - connect the {} to the RaspberryPi running server.py.
% - connect the PowerIt to the RaspberyyPi as described in the documentation
% - and be sure to connect the {} to the {} Terminal.
%
% Continue (y/N): y
%
% What is the Name given to the connected PowerIt? [Bxx]: B05
% \end{mintylst}
\section{Regulation}
\subsection{Resulting Observation}
To verify the regulation is working and to see if the prediction in \autoref{fig:regswrm} is correct new values were measured.
THese Values are the voltages with regulation enabled at different Reticles (see \autoref{fig:postreg}).
\begin{figure}[H]
\centering
\vspace{-1cm}
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180825/ret_vdip.pdf}
\vspace{-1cm}
\caption{%
Observed AnaB voltages after regulation at multiple reticles.
Reticle \#40 shows the best-case scenario with the least amount of V\(_\text{drop}\).
Reticle \#5 is a worst-case scenario, with the highest V\(_\text{drop}\) while still being a usable reticle.
}%
\label{fig:postreg}
\end{figure}
In this figure three different reticles (\#5, \#29 and \#40) were measured.
Observable is, that firstly the regulation, which was set to achieve \SI{1.8}{\volt} is working until I\(_{ana}\) is at about \SI{80}{\ampere}.
There the minmal potentiometer setting is used.
From here further regulation, with the same hardware, is impossible.
Secondly the voltages for different reticles is different and not equal.
This was one of the assumptions in the SWRM.
To describe that behavior a distance based model (\autoref{sec:dwrm}: DWRM) could be the solution.
And third, under the assumption of a constant fit (up to I\(_{ana} \approx \SI{80}{\ampere}\)) a systematic error can be observed.
\begin{figure}[H]
\centering
\includegraphics[width=\columnwidth]{../pitstop/20180821/reticle_variance.pdf}
\caption{%
}%
\label{fig:reg}
\end{figure}
\subsection{Distance Wafer Resistance Model (DWRM)}\label{sec:dwrm}
Although the through SWRM gained functions approximate the real world, it is not exact enough.
In a wafer, the distance between reticles and voltage connector (see \autoref{fig:mainpcb}) are resulting in additional resistance.
Therefore we adapt the DWRM after Circuit~\ref{fig:retmodelshell} in which each different Distance requires additional Resistors.
Therefore the DWRM could be adapted.
Circuit~\ref{fig:retmodelshell} visualizesa model, in which each different distance from the voltage connector, is classified with an additional resistance.
\begin{figure}[H]
\centering
@ -139,6 +220,9 @@ Now just following the instructions given, the selected test can be run:
\centering
\hspace*{-.14\columnwidth}
\includegraphics[width=1.2\columnwidth]{../pitstop/20180821/reticel_rtheo.pdf}
\vspace{-1cm}
\caption{Distances of reticles to the nearest voltage supplying connection for DWRM, distance is in reticle-side length}%
\label{fig:retmodelrdist}
\end{figure}
\end{figure}
Additionally this model is a better fit to the already observed voltage distribution in \autoref{fig:wrdist}.

View File

@ -1,5 +1,5 @@
%! TEX root = ../thesis.tex
\chapter{Theory}
\chapter{Theory}\label{ch:theory}
This chapter will be discussing the fundamental principles used in the experiments.
These will contain simplified circuits and their respective equations as well as component behavior as specified in their respective datasheets by their manufacturer
@ -224,14 +224,26 @@ On the other hand, to calculate the voltage to output, it is necessary to classi
\begin{figure}[H]
\centering
\includegraphics[width=.6\columnwidth]{./data/theory/wafer.pdf}
\caption{Reticle diagram of a wafer in BrainScaleS. All 48 Reticles are shown}%
\includegraphics[width=.8\columnwidth]{./data/theory/wafer.pdf}
\caption{Reticle diagram of a wafer in BrainScaleS. All 48 Reticles are shown. This Layout is an approximation of realworld positioning. A single reticle has a width of \SI{20.0482}{\milli\meter} and height of \SI{20.145}{\milli\meter}, with additional space in between reticles of \SI{420}{\micro\meter} horizontally and \SI{250}{\micro\meter} vertically~\cite{waferembedding}}%
\label{fig:wafer}
\end{figure}
It has the same layout as its system counterparts and each of the 48 reticles can be accessed, digitally as well as electrically.
And like its system counterparts it is placed on a MainPCB (see \autoref{fig:mainpcb}).
All CURE boards connect to it and control the PowerFETs, as well as provide voltage readout from each reticle.
The CURE boards read right before \(R_1\) in \autoref{fig:retmodel}.
Also on the MainPCB are the AnaB boards.
Note that here lies another specialization of the PowerWafer.
All reticles' analog and digital \SI{1.8}{\volt} lines are connected directly to pins on the analog readout boards~\cite{anabpower}.
There it is possible to aaccess a voltage, which is measured after the load resistors in \autoref{fig:retmodel}
(after \cite{waferembedding})
\begin{figure}[H]
\centering
\includegraphics[width=.8\columnwidth]{./tikz/mainpcb_back.pdf}
\includegraphics[width=.9\columnwidth]{./tikz/mainpcb_back.pdf}
\caption{A photograph of the top of the MainPCB (courtesy of Maurice G\"{u}ttler~\cite{waferembedding}).
The board has a length and width of 43cm.
Visible in the center are the PowerFETs (Field Effect Transistors) (1) which switch the power supply of each reticle.
@ -242,25 +254,7 @@ On the other hand, to calculate the voltage to output, it is necessary to classi
The main supply voltages V\(_\text{DDA}\) (red) and V\(_\text{DDD}\) (blue) are generated on the PowerIt and inserted at the marked screw connections.}%
\label{fig:mainpcb}
\end{figure}
% \begin{figure}[H]
% \centering
% \includegraphics[width=.7\columnwidth]{./pics/waferpcb.png}
% \caption{Part of the main pcb on which a wafer is placed, visible are the 48 Reticles and two terminals each for 1.8V Digital (blue) and Analog (red), which correspond to the output terminals on a PowerIt, a reticles dimensions are \SI{2.0077}{\centi\meter} by \SI{2.0077}{\centi\meter}}%
% \label{fig:mainpcb}
% \end{figure}
It has the same layout as its system counterparts and each of the 48 reticles can be accessed, digitally as well as electrically.
And like its system counterparts it is placed on a MainPCB (see \autoref{fig:mainpcb}).
All CURE boards connect to it and control the PowerFETs, as well as provide voltage readout from each reticle.
The CURE boards read right before \(R_1\) in \autoref{fig:retmodel}.
Also on the MainPCB are the AnaB boards.
Note that here lies another specialization of the PowerWafer.
All reticles' analog and digital \SI{1.8}{\volt} lines are connected directly to pins on the analog readout boards~\cite{anabpower}.
There it is possible to aaccess a voltage, which is measured after the load resistors in \autoref{fig:retmodel}
(after \cite{waferembedding})
\subsection{Simple Wafer Resistance Model (SWRM)}\label{sec:swrm}
To describe the reistances on such a wafer module, a model is needed.

View File

@ -11,7 +11,7 @@
\usepackage[hidelinks]{hyperref}
\usepackage{tcolorbox}
\tcbuselibrary{listings, minted, skins}
\newtcbinputlisting{\minty}[3][]{%
\newtcbinputlisting[]{\minty}[3][]{%
enhanced,
listing engine=minted,
colback=mintedbg,

Binary file not shown.

View File

@ -3,7 +3,7 @@
\usepackage{xparse}
\usepackage{siunitx}
\sisetup{separate-uncertainty}
\input{../pitstop/20180819/res.tex}
\input{../pitstop/20180824/res.tex}
\usepackage{a4wide}
\usepackage{fontawesome}
@ -22,6 +22,10 @@
\titleformat*{\section}{\bfseries\Large}
\titleformat*{\subsection}{\bfseries\large}
\renewcommand{\listingscaption}{\sffamily Code}
\newcommand{\codecaption}[1]{\caption{\parbox[t]{.9\linewidth}{#1}}}
\providecommand*{\listingautorefname}{code}
\author{Patrick Nisblé}
\title{\color{myteal}Calibration and Regulation of BrainScaleS' PowerIt Subsystems}
\begin{document}
@ -39,9 +43,12 @@
\include{parts/experiments}
\include{parts/results}
\include{parts/outlook}
\setcounter{chapter}{0}
\renewcommand{\thechapter}{\Roman{chapter}}
\include{parts/appendix}
\newpage
\pagenumbering{Alph}
% \pagenumbering{Alph}
\bibliographystyle{ieeetr}
\bibliography{../../github/ubib/ubib.bib}
\newpage