diff --git a/data/pit.code-workspace b/data/pit.code-workspace
new file mode 100644
index 0000000..aba8aac
--- /dev/null
+++ b/data/pit.code-workspace
@@ -0,0 +1,8 @@
+{
+	"folders": [
+		{
+			"path": "remote_proj"
+		}
+	],
+	"settings": {}
+}
\ No newline at end of file
diff --git a/data/remote_proj/.vscode/tasks.json b/data/remote_proj/.vscode/tasks.json
new file mode 100644
index 0000000..9d15d02
--- /dev/null
+++ b/data/remote_proj/.vscode/tasks.json
@@ -0,0 +1,14 @@
+{
+    // See https://go.microsoft.com/fwlink/?LinkId=733558
+    // for the documentation about the tasks.json format
+    "version": "2.0.0",
+    "tasks": [
+        {
+            "label": "(remote) connect",
+            "type": "shell",
+            "command": "${workspaceFolder}/../sshfs.sh",
+            "auto": true,
+            "problemMatcher": []
+        }
+    ]
+}
\ No newline at end of file
diff --git a/data/remote_proj/lib-chibios b/data/remote_proj/lib-chibios
new file mode 120000
index 0000000..68877c1
--- /dev/null
+++ b/data/remote_proj/lib-chibios
@@ -0,0 +1 @@
+../afshome/clean_jenk/lib-chibios
\ No newline at end of file
diff --git a/data/remote_proj/sw-stm32 b/data/remote_proj/sw-stm32
new file mode 120000
index 0000000..6509d09
--- /dev/null
+++ b/data/remote_proj/sw-stm32
@@ -0,0 +1 @@
+../afshome/clean_jenk/sw-stm32
\ No newline at end of file
diff --git a/data/sshfs.sh b/data/sshfs.sh
index 62c6527..05442f4 100755
--- a/data/sshfs.sh
+++ b/data/sshfs.sh
@@ -1 +1 @@
-mountpoint ~/gitlab/BaTh/data/afshome || sshfs hbpc9:. ~/gitlab/BaTh/data/afshome
+mountpoint ~/gitlab/BaTh/data/afshome || sshfs obss6:. ~/gitlab/BaTh/data/afshome
diff --git a/parts/experiments.tex b/parts/experiments.tex
index 2d49a40..eba3683 100644
--- a/parts/experiments.tex
+++ b/parts/experiments.tex
@@ -5,7 +5,9 @@
 \section{Characterization}
 
 \subsection{sampling time}
-The first experiment needed to run was fo selecting an optimal number of cycles for which the adc will probe the to it at that moment connected pin. 
+The first experiment needed to run was selecting an optimal number of cycles for which the adc will probe the to it at that moment connected pin. 
+
+The ADC Sampling works by connecting one of the internal 12bit ADCs to a given Pin and then taking a sample value and disconnecting from the Pin, this proceure repeats fo all given pins and is bound to a Timer, whose Interrupts define the number of Ticks an ADC has to process the connected Voltage on a Pin.
 
 In this case the uncalibrated measurement of our input voltage was taken as example, and repeated with each of the possible 8 settings of the in Firmware used value.
 
@@ -18,6 +20,11 @@ The resulting errors can be seen in figures \ref{sampleticks1} and \ref{sampleti
     \caption{plotted difference from set input voltage, and fitted linearly, May 29th 2018, $\approx$32\si\degree C}
     \label{sampleticks1}
 \end{figure}
+
+Both figures \ref{sampleticks1} and \ref{sampleticks2} contain the relative error of the measured voltage compared to the theoretical , set input voltages. therefore the reference measurements (yellow), taken with an external multimeter, are not at 0.
+Also shown are the calculated gain erors which would need to be corrected for in case of all 8 settings.
+Important in figure \ref{sampleticks1} is the relative error in only the 0th case, here the cycleTime-Setting was set to 0 and therefore the smallest available sampletime. All other measurements are within errormargin of each other. 
+The secondary plots confirm the 
 \begin{figure}[H]
     \centering
     \hspace*{-.16\columnwidth}
@@ -31,6 +38,13 @@ The resulting errors can be seen in figures \ref{sampleticks1} and \ref{sampleti
     \subsubsection{48V Input}
 
     \subsubsection{9.6V Output}
+    \begin{figure}[H]
+        \centering
+        \hspace*{-.16\columnwidth}
+        \includegraphics[width=1.3\columnwidth]{../pitstop/20180706/v10_0_nocalib.pdf}
+        \caption{TODOF}
+        \label{v10_precalib}
+    \end{figure}
 
     \subsubsection{1.8V Output}
 
@@ -82,8 +96,8 @@ The resulting errors can be seen in figures \ref{sampleticks1} and \ref{sampleti
         \begin{figure}[H]
             \centering
             \hspace*{-.16\columnwidth}
-            \includegraphics[width=1.3\columnwidth]{pitstop/20180629/i18ana_nocalib.pdf}
-            \caption{Pre Calibration Measurement of Output Current at the 1.8V Analog Terminal (29.06.2018)}
+            \includegraphics[width=1.3\columnwidth]{pitstop/20180702/i18ana_nocalib.pdf}
+            \caption{Pre Calibration Measurement of Output Current at the 1.8V Analog Terminal (2.7.2018)}
             \label{precalib18iana}
         \end{figure}
 
diff --git a/parts/theory.tex b/parts/theory.tex
index 93d3125..37eceb0 100644
--- a/parts/theory.tex
+++ b/parts/theory.tex
@@ -94,5 +94,8 @@ Our calculation is based on:
 \subsection{1.8V Output Current}
 
 \section{ADC Calibration}
+\subsection{serial ADC readout}
+While the measurements done by the STM32-Chip are using a 12bit ADC, we don't have enough of these inside to be able to completely parallelize the measurements, also only one ADC will be connected to all connected Pins and switch between them.
+
 \section{1.8V Output Regulation}
 %\section{Firmware Requirements}
diff --git a/pitstop b/pitstop
index f240f3d..4121855 160000
--- a/pitstop
+++ b/pitstop
@@ -1 +1 @@
-Subproject commit f240f3db2e8256ade583b7245ab402555733d5f1
+Subproject commit 41218559d79c2501c58c529ff50ba8b03b4dd39f