%! TEX root = ../thesis.tex


\chapter{Introduction}

\section{What is the BrainScale System?}

The BrainScale Wafer System~\cite{hbpguidebook}, developed and used in the electronic visions Group at Heidelberg University is a neuromorhic hardware implementation.\\\\
For this thesis the following core components are of importantance: 
\begin{itemize}
    \item the mixed-signal ASICs, named HICANNs, structured in packs of 8 into ``Reticles''
    \item the Control Units for Reticles, short CURE Boards
    \item the analog breakout Boards, AnaB for short
    \item and the power supply, called PowerIt.
\end{itemize}

\begin{figure}[H]
    \centering
    \includegraphics[width=.9\textwidth]{pics/waferscale_system.png}
    \caption{The BrainScaleS wafer-scale hardware system, marked are the main components comprising a single wafer system.~\cite{hbpguidebook-brainscales}}\label{fig:wss}
\end{figure}

\section{About the PowerIt Subsystem}

The main subject of this thesis is the PowerIt board (\autoref{fig:pitteststand}). It functions as power supply inside of the WaferScale System (\autoref{fig:wss}). 
In which it is providing the Wafer with 1.8V and the FPGAs with 9.6V. Its maximum rated Powerdraw is 2kW.~\cite{poweritupgrade}

\begin{figure}[h]
    \centering
    \includegraphics[width=.7\textwidth]{pics/poweritv2_teststand_2}
    \caption{PowerIt Board, top view, receiving 48V as input (top left) and outputting 9.6V (top and bottom) as well as 1.8V (analog: top left, bottom right; digital: top right, bottom left)}\label{fig:pitteststand}
\end{figure}

The ``Brain'' of these PowerIt Boards is a STM32 Chip\footnote{STM32F405RGT~\cite{stm32f405xx}} which runs a custom Firmware based on ChibiOS~\cite{chibios}.

\newpage
\section{Intentions of this Work}
\begin{itemize}
    \item Upgrade the PowerIt Firmware to be able to calibrate all on board measurements, voltages and currents.

        This requires the Firmware to handle calibration changes on the fly.
    \item Provide a communication interface for changing those parameters at runtime.

        Assuming v2 of the communication Protocol (PItCOMM) we require write access to all coefficients, defining the degree of polynomial is done at compile time.
    \item Provide access to more parameters within the PowerIt while unifying the protocol used.

        Collect all writable, readable and static parameters in a single interface using PItCOMM v2, creating a mapping for reference to those values.
    \item Calibrate the onboard measurement circuits, using a database containing uniquely mappable values.

        Characterizing the circuits, providing a default for fallback and a Database file, readable by the BrainScaleS Monitoring System and the Person calibrating each Board.
    \item Provide a regulation mechanism for stable, modifiable output at its endpoints.

        The connection between PowerIt and HICANNs can be seen as a non trivial Resistor, which requires the 1.8V output to regulate based on experimental data.
\end{itemize}
