%! TEX root = ../thesis.tex
\chapter{Experiments}
Now that the theoretical model sicomplete, experiments can be done to start checking that model and get results to use for in system components.

\section{Characterization}

The first experiments to run are the caracterization of hardware behavior. These will then result in a PowerIt Calibration, which later then can be used as basis for creating a regulation method.

\subsection{sampling time}
    First up was selecting an optimal number of cycles for which the adc will probe a to it connected pin, like described in \autoref{sec:adc}.

    In this case the uncalibrated measurement of input voltage was taken as example, and repeated with each of the possible 8 settings.

    To be able to compare a reference voltage measurement was taken with an external Voltmeter.
    The resulting errors, from a set Voltage, can be seen in figures \ref{sampleticks1}

    \begin{figure}
        \centering
        \hspace*{-.175\columnwidth}
        \includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180529.pdf}
        \caption{plotted difference from set input voltage, and fitted linearly, May 29th 2018, $\approx$32\si\degree C}
        \label{sampleticks1}
    \end{figure}

    \autoref{sampleticks1} contains the relative error of the measured voltage compared to the theoretical, set input voltages. therefore the reference measurements (yellow), taken with an external multimeter, are not at 0.
    Also shown are the calculated gain erors, in case of all 8 settings.

    Important to note is the relative error in only the 0th case, here the \verb|cycleTime|-Setting was set to 0 and therefore the smallest available sampletime of 3 Ticks. This excludes 0 a possible value to use. All other measurements are within errormargin of each other, and because a smaller timeframe is preferred, the best value to use is 1, resulting in a measuretime of 15 Ticks. 

    % TODO: move to appendix
    %\begin{figure}[H]
    %    \centering
    %    \hspace*{-.175\columnwidth}
    %    \includegraphics[width=1.3\columnwidth]{./data/m04_cycledepends/cycledepends_20180530.pdf}
    %    \caption{plotted difference from set input voltage, and fitted linearly, May 30th 2018, $\approx$25\si\degree C}
    %    \label{sampleticks2}
    %\end{figure}

\subsection{Voltages}

    Now that a sampleTime is chosen, it is possible to proceed with the voltage calibration measureemnts.
    Note, that Measuremts are expected to be less accurate, the more components are contained in their respective measurement circuit. Because small errors will accumulate and in e.g. the case of 48V's be amplified by a factor of 8.

    \subsubsection{48V Input}

        \begin{figure}[H]
            \centering
            \vspace{-1cm}
            \hspace*{-.16\columnwidth}
            \includegraphics[width=1.3\columnwidth]{../pitstop/20180815/calib_v48.pdf}
            \caption{Calibration of input voltage, plotted are a external measurement and internal values, vs the recalculated pin voltage based on the internal value and used default function (default coefficients see \autoref{pitdb-example})}%
            \label{v48_precalib}
        \end{figure}

        When looking at calibrating the input voltage (\autoref{v48_precalib}), we can clearly see a relatively constant offset of $\approx$1V.
        In \autoref{v48_precalib} a polynomial fit of 2nd degree\footnote{A Fit of second degree will be used in the complete calibration process} is done and its coeffficients extracted (\autoref{pitdb}, line 9).
        These coefficients not only show an offset, but also some deviation in the incline and curve from the default values.

        \subsubsection{9.6V Output}
        
        \begin{figure}[H]
            \centering
            \vspace{-1cm}
            \hspace*{-.16\columnwidth}
            \includegraphics[width=1.3\columnwidth]{../pitstop/20180815/calib_v10.pdf}
            \caption{Calibration of 9.6V output Voltage, plotted are an external measurement and internal values vs the recalculated pin voltage based on the default coefficients (\autoref{pitdb-example})}%
            \label{v10_precalib}
        \end{figure}

        The 9.6V Calibration, in contrast, shows only a slight deviation of the internal values and the reference measurement, which results in a list of coefficients (\autoref{pitdb}, line 7), very similar to those set in the theoretical defaults.

        This small difference is explained by the simple voltage division used as our circuitry, and no amplification, as for the input voltage circuit.

    \subsubsection{1.8V Output}

        The last Voltage to calibrate is divided into two domains, one for supplying the analog circuitry inside the wafer system, and one for the digital side. Each deliver between 1.5%TODO: value!!
        and 2.022V and each is settable by its own circuit (both as in \autoref{fig:gen18v}).

        \begin{figure}[H]
            \centering
            \vspace{-1cm}
            \hspace*{-.15\columnwidth}
            \includegraphics[width=1.3\columnwidth]{./data/m03_poticalib/adccalib_02.pdf}
            \caption{Calibration: analog 1.8V Output voltage, plotted are external measurement and internal values vs set resistance at the BCU Voltage Module.}%
            \label{fig:v18_precalib}
        \end{figure}

        Visualized in \autoref{fig:v18_precalib} is the analog domains calibration, showing nearly no difference in board and reference measurements. Mostly due to direct connection between created voltage and the STM-Chips pin.

\subsection{Currents}
    
With now calibrated Voltages, the next step is to measure the behavior of the measuring circuits.
Note that the 9.6V Output does in fact not have a include circuit for measuring its current draw, and that this number will be obtainable from all other (calibrated) measurements.

    \subsubsection{48V Input}

        
        \begin{figure}[H]
            \centering
            \hspace*{-.16\columnwidth}
            %TODO: transparent
            %\vspace{-1cm}
            \includegraphics[width=1.3\columnwidth]{./pitstop/20180809/calib_i48.pdf}
            \caption{Calibration of input current adcs 21.06.2018}
            \label{}
        \end{figure}

    \subsubsection{1.8V Output}
        \begin{figure}[H]
            \centering
            \hspace*{-.15\columnwidth}
            %TODO: transparent
            %\vspace{-1cm}
            \includegraphics[width=1.3\columnwidth]{./pitstop/20180809/calib_i18.pdf}
            \caption{Pre Calibration Measurement of Output Current at the 1.8V Analog and Digital Terminal (2.7.2018)}
            \label{precalib18iana}
        \end{figure}


%\section{after Calibration}

%\minty[minted options={lastline=10}, label={pitdb}]{yaml}{./pitstop/pitdb.yaml}

%\subsection{Voltages}

%    \subsubsection{48V Input}

%    \subsubsection{9.6V Output}

%    \subsubsection{1.8V Output}

%\subsection{Currents}

%    \subsubsection{48V Input}
        
%    \subsubsection{9.6V Output}

%    \subsubsection{1.8V Output}
%        \begin{figure}[H]
%            \centering
%            \hspace*{-.16\columnwidth}
%            \includegraphics[width=1.3\columnwidth]{./pitstop/20180702/i18ana_postcalib.pdf}
%            \caption{Post Calibration Measurement of Output Current at the 1.8V Analog Terminal (29.06.2018}
%            \label{postcalib18iana}
%        \end{figure}

\section{1.8V Regulation}

As Described beforehand the Output Voltages for both analog and digital can be adjusted to some degree and therefore we can compensate for the dropoff occuring between PowerIt Output Terminals and Reticles.

\subsection{Characterization of Dropoff}

Wanting to observe and characterize the voltage drop, first the connections between PowerIt and Reticles can be measured with the in \autoref{fig:retmodel} described connections, which in actuallity are the PowerIT Terminal and corresponding analog readout pin on a Analog readout board.

IN \autoref{1v8dip} a single reticles Voltage Dip for different Current Draws is visualized.
A relatively linear trand and residuals of a trigonometric behavior can be observed, most likely the result of the inaccurately measureable currrent which is in this Figure done inside the PowerIt.

\begin{figure}[H]
    \centering
    %\vspace*{-1cm}
    \hspace*{-.16\columnwidth}
    \includegraphics[width=1.3\columnwidth]{./pitstop/20180807/ret_vdip.pdf}
    \caption{Voltage dip observed between PowerIt and HICANN, each point represents the state after enabling additional Reticles on the PowerWafer ()}
    \label{1v8dip}
\end{figure}
This measuring circuit has some inconsitencies because of the 2nd degree polynimial fit, which is not the appropriate description fr the used compenents, but intead should be some function proportional to $\frac 1x$, like the one described in \autoref{eq:fullreg}.

\subsection{after Numerical-Correction}

The initial approach is a numerical. Through derivation from Figures~\ref{1v8dip} and~\ref{v18_precalib} we can plot a function which maps the measured output current to a corresponding potentiometer setting (\autoref{numericalreg}) for which the observed dropoff will be mitigated (or at least near that). Also important is that it is not possible to use non interger values for the potentiometer setting.

\begin{figure}[H]
    \centering
    \hspace*{-.16\columnwidth}
    \includegraphics[width=1.3\columnwidth]{./pitstop/20180807/ret_regulation.pdf}
    \caption{Potentiometer Setting (discrete integer), derived from ouput current (discrete floating point). }
    \label{numericalreg}
\end{figure}

Fitting these values, with a polynomial of 2nd degree, we obtain:
\begin{align}
    P_{val} =& \lfloor m_2 \cdot I_{ana}^2 + m_1 \cdot I_{ana} + m_0 \rceil\\
    m_2 =& 51.390262 \frac 1 A\\ 
    m_1 =& -0.263850\frac 1 A\nonumber\\
    m_0 =& 0.000258\frac 1 A\nonumber
\end{align}

Which is the numeraical solution if the only desired voltage on HICAN Chips is 1.8V. But if we want to change these, we need a more general solution.

Assuming the 2nd order Term to be small enough, we can assume a linear proportionality between the current and voltage:

\begin{align}
I_{ana, eff} = I_{ana} - \frac{V_{out}-1.8V}{c}
\end{align}

where c is obtained from the linear fit (incline) in figure \ref{1v8dip}

\begin{align}
    c = 71.6978\cdot 10^{-3} \frac V A
\end{align}

\begin{figure}[H]
    \centering
    \hspace*{-.1\columnwidth}
    \includegraphics[width=1.2\columnwidth]{./pitstop/20180807/reticle_pic}
    \caption{ret5wafer}
    \label{fig:wafer-ret5}
\end{figure}
\begin{figure}[H]
    \centering
    \hspace*{-.15\columnwidth}
    \includegraphics[width=1.3\columnwidth]{./pitstop/20180807/reticle_corr}
    \caption{ret5}
    \label{fig:ret5}
\end{figure}

\begin{align}
    \pyval{r0_from_neighbor}\\
    \pyval{r0_from_farthest}\\
    \pyval{r0mean}\\
    \pyval{r0meancorr}
\end{align}

\begin{align}
    \pyval{r1_from_neighbor}\\
    \pyval{r1_from_farthest}\\
    \pyval{r1mean}\\
    \pyval{r1meancorr}
\end{align}

\section{Pitfalls}

