322 lines
19 KiB
TeX
322 lines
19 KiB
TeX
%! TEX root = ../thesis.tex
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\chapter{Theory}\label{ch:theory}
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This chapter will be discussing the principles used in the experiments.
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These will contain simplified circuits and their respective equations as well as component behavior, specified in their respective data sheets.
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\section{Hardware Component Behavior}
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Before discussing the experimental results it needs to be clear what circuitry is used in these experiments and what behavior we expect.
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Keeping in mind, that these are theoretical values and can be different from those found in actual hardware, as all given values will always be within some error.
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Each of the three voltage regimes that can be observed on the PowerIt board, \SI{48}{\volt}, \SI{9.6}{\volt} and \SI{1.8}{\volt}, has a voltage measurement circuit.
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In the cases of \SI{48}{\volt} and \SI{1.8}{\volt} there also exists a current measurement circuit.
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Additionally there is a temperature sensor built into the STM32 chip.
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\subsection{ADC Calibration}\label{sec:adc}
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The measurements will be done by a STM32-internal ADC.
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A single ADC will be switching between all connected pins.
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This Behavior can be problematic in regards to measuring accurately.
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The reason for that is that the switching process requires the voltage to change within a given number of cycles (sample ticks).
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The measured voltage would be dependent on the previous value if this sample time is not big enough.
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The timing used to measure a single pin can be set from 3 up to 480 clock ticks.
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\subsection{48V Input Voltage}\label{sec:mon48v}
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The circuits for measuring input voltage and current are the most complex.
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For voltage measurement the circuit needs to
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\begin{itemize}
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\item divide our input voltage into a usable potential range, which is accomplished with a 1:240 voltage divider,
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\item decouple the input (\SI{48}{\volt}) from signal potential (\SI{3.3}{\volt}), with a full differential operation amplifier
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\item and amplify the voltage, to be in the STM32-Chips Voltage range of up to \SI{3.3}{\volt}, with another amplifier, which also converts the differential into a single-ended signal.
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\end{itemize}
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The already implemented circuit can be seen in \autoref{mon48v}.
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\begin{figure}[H]
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\centering
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\includegraphics[width=.9\textwidth]{./tikz/mon48v.pdf}
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\caption{Circuit for measuring the \SI{48}{\volt} input voltage, consisting of input potential (left), two resistors as voltage divider, one fully differential isolation amplifier (left), one operational Amplifier (right), output voltage (right).}%
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\label{mon48v}
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\end{figure}
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This circuit results in the following equation for calculating the input voltage from a pin voltage:
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\begin{align}
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V_\text{48V in}\cdot\frac{R_1}{R_1+R_2} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} =&~V_\text{MONITOR\_48V}\nonumber\\
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\Leftrightarrow \quad \frac{V_\text{MONITOR\_48V}}{r_\text{diffOpAmp}\cdot r_\text{OpAmp}}\cdot\frac{R_1+R_2}{R_1} =&~V_\text{48V in}
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\intertext{and the extremes, when assuming \SI{48+-4.8}{\volt} are}
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V_\text{MONITOR\_48V, min} = \SI{43.2}{\volt}\cdot\frac{1}{240+1}\cdot 8\cdot 1.1 \approx&~\SI{1.6}{\volt}\\
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V_\text{MONITOR\_48V, max} = \SI{52.8}{\volt}\cdot\frac{1}{240+1}\cdot 8\cdot 1.1 \approx&~\SI{1.9}{\volt}
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\end{align}
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The \SI{48+-4.8}{\volt} range was chosen under the assumption of a maximum \SI{10}{\%} error, for the power supply.
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The ADCs 12bit resolution gives a maximum voltage resolution of \(\approx\) \SI{2}{\milli\volt}.
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\subsection{\SI{48}{\volt} Input Current}
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The circuit has to satisfy the following constraints:
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\begin{itemize}
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\item use a shunt resistor, with minimal heat dissipation
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\item while still providing a good resolution within the STM32-Chips specifications
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\end{itemize}
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To accomplish that, the circuit is measuring the voltage over a \SI{500}{\micro\ohm} shunt Resistor, while a current is flowing.
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The shunt resistor also produces about \SI{21}{\milli\watt} of heat at full current draw, which is easily dissipated.
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By Ohms Law that results in a linear proportionality between current and the obtained voltage, which is then decoupled and amplified by a factor of 8.
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It is also then converted from a differential to single ended voltage, with a amplification factor of 1.1.
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\begin{figure}[H]
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\centering
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\includegraphics[width=.9\textwidth]{./tikz/mon48i.pdf}
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\caption{Circuit for measuring the \SI{48}{\volt} input current, consisting of PowerIt, one shunt-resistor, one full diff isolating Amplifier, one operational amplifier, output potential.}%
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\label{mon48i}
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\end{figure}
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Here the same amplifiers as in \autoref{sec:mon48v} are used and so we can apply the following equation for our input current:
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\begin{align}
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I_\text{48V IN}\cdot R_\text{shunt} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} = V_\text{48I pin}\nonumber\\
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\Leftrightarrow\quad \frac{V_\text{48I pin}}{R_\text{shunt}} \cdot \frac{1}{r_\text{diffOpAmp}\cdot r_\text{OpAmp}} = I_\text{48V IN}
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\end{align}
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The current range is from \SI{0}{\ampere} up to \SI{41.7}{\ampere} (= \SI{2}{\kilo\watt} / \SI{48}{\volt})and gives a resulting observable voltage range from \SI{0}{\volt} to:
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\begin{align}
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\SI{41.7}{\ampere}\cdot \SI{500}{\micro\ohm} \cdot 8\cdot 1.1 \approx&~\SI{185}{\milli\volt}
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\end{align}
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This results in a maximum resolution of \SI{.18}{\ampere}.
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\subsection{9.6V Output Voltage}
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The measurement of \SI{9.6}{\volt} output voltage circuit is quite a bit simpler.
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This circuit consists of a 1:3 voltage divider.
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\begin{figure}[H]
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\centering
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\resizebox{.55\columnwidth}{.12\paperheight}{%
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\begin{circuitikz}[scale=2]
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\draw[color=black, thick]
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(0,0) node[left]{GND}
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to [short, o-] (1,0)
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to [R, l_={R1 1k}] (1,1)
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(0,2) node[left]{9.6V}
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to [short, o-] (1,2)
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to [R, l={R2 3k}] (1,1)
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to [short, *-] (3, 1) node[right, draw=black] {MONITOR\_10V};
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\end{circuitikz}
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}
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\caption{Circuit for measuring 9.6V output voltage. Consisting of a voltage divider with 1:3 ratio, input voltage (left) and output voltage (right)}%
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\label{fig:mon10v}
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\end{figure}
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To describe that circuit the following equation can be used:
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\begin{align}
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\frac{V_\text{9.6V IN} \cdot R_1}{R_1 + R_2} =&~V_\text{MONITOR\_10V}\\
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\Leftrightarrow \frac{V_\text{MONITOR\_10V}}{R_1} \cdot \left( R_1+R_2\right) =&~V_\text{9.6V IN}
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\end{align}
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With the given voltage range of the input voltage from \SIrange{43.2}{52.8}{\volt} the observable voltage range for this circuit is from \SIrange{8.64}{10.56}{\volt}.
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And with the 12bit ADC that gives a maximum resolution of \SI{3.2}{\milli\volt}
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\subsection{1.8V Output Voltage}
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This voltage is measured directly with the STM32-Chip.
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Until now the voltages and currents could only be measured, now the mechanism for setting a resulting voltage at the \SI{1.8}{\volt} terminals is changeable.
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The circuit for generating \SI{1.8}{\volt} can be seen in \autoref{fig:gen18v}.
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It consists of a power module and the three resistors R\(_\text{series}\), R\(_\text{parallel}\) and R\(_\text{pot}\).
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The resistances set the output to a given voltage of around \SI{1.8}{\volt}.
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Based on R\(_\text{pot}\) this voltage is varied, because this resistance is settable via a digital potentiometer\footnote{MCP4152 digital potentiometer~\cite{mcp4152}}.
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\begin{figure}[H]
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\centering
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\includegraphics[width=.55\textwidth]{./tikz/gen18v.pdf}
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\caption{%
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Schema of a 1.8V supply circuit. It features a DC-DC Converter, a resistor chain, supply voltage (left) and resulting voltage (V\(_O\)).
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}%
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\label{fig:gen18v}
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\end{figure}
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The in \autoref{fig:gen18v} used \SI{1.8}{\volt} converter has a characteristic output voltage formula~\cite{pth08t}, written in \autoref{eq:vout}.
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The in this circuit used \SI{10}{\kilo\ohm} potentiometer is linear.
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Therefore equations~\ref{eq:rpot},~\ref{eq:rset} and~\ref{eq:vout} describe the circuit.
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\begin{align}
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R_\text{pot} =& P_\text{val} \frac{\SI{10}{\kilo\ohm}}{256} \label{eq:rpot}\\
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R_S =& \left(\frac{1}{R_\text{pot}} + \frac{1}{R_\text{parallel}}\right)^{-1} + R_\text{series}\nonumber \\
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=& \frac{R_\text{pot}\cdot R_\text{parallel}}{R_\text{pot} + R_\text{parallel}} + R_\text{series}\label{eq:rset}\\
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V_\text{MONITOR\_1V8} =& \frac{\SI{30.1}{\kilo\ohm}}{R_S + \SI{6.49}{\kilo\ohm}} \cdot \SI{0.7}{\volt} + \SI{0.7}{\volt} \label{eq:vout}
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\end{align}
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Visualizing the \autoref{eq:rset} results in \autoref{fig:beh1v8}, in which the limits of this circuit are visible.
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\begin{align}
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V_\text{MONITOR\_1V8, min} \approx&~\SI{1.6}{\volt}\\
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V_\text{MONITOR\_1V8, max} \approx&~\SI{2.0}{\volt}
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\end{align}
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And these extremes will be a limiting factor later on.
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Also with the 12bit ADC that results in a maximum resolution of \(\approx\)\SI{1}{\milli\volt}.
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\begin{figure}[H]
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\centering
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\vspace{-.5cm}
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\hspace*{-.152\textwidth}
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\includegraphics[width=1.25\textwidth]{./tikz/v18.pdf}
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\caption{%
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Expected behavior curve of 1.8V output voltage vs potentiometer setting.
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Shown is the complete range of possible settings and their resulting voltage.
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The zoomed in partial view shows that because the setting can only be of integer value any resulting values are also discrete.
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A single step can increase the voltage by somewhere between \SI{1.1}{\milli\volt} and \SI{3.3}{\milli\volt}
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}%
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\label{fig:beh1v8}
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\end{figure}
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\subsection{1.8V Output Current}
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The outgoing current over 1.8V is measured by a hall sensor, which outputs a voltage to be measured. Each connection (digital and analog) has this sensor in series to its load.
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\begin{figure}[H]
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\centering
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\resizebox{.55\columnwidth}{.12\paperheight}{%
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\begin{circuitikz}[scale=2]
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\draw[color=black, thick]
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(-1,0) %node[left]{GND}
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to [short,f<^=I$_\text{1.8V}$, -] (1,0)
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to [] (1,.5)
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(-1,2) %node[left]{1.8V}
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to [short, f>_=I$_\text{1.8V}$, -] (1,2)
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to [] (1,1.5)
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(1.2,1) node[draw=black, regular polygon, regular polygon sides=4, minimum size=2.7cm]{ACS758}
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(1.75,1)
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to [short, *-] (3, 1) node[right, draw=black] {VDD\_1V8\_*};
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\end{circuitikz}
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}
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\caption{Circuit for measuring 1.8V current. It features a ACS758 hall sensor, input current (left) and output voltage (right)}%
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\label{fig:mon18i}
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\end{figure}
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The hall sensor is rated for a maximum constant current draw of \SI{200}{\ampere}, and features the following behavior:
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\begin{align}
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I_\text{1.8V, in} \cdot \SI{0.004}{\volt\per\ampere} + \SI{0.12}{\volt} =&~V_\text{MONITOR\_1I8}\\
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\intertext{By applying the limits of \SI{0}{\ampere} and \SI{200}{\ampere}, the following voltage range can be observed:}
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\SI 0\ampere \cdot\SI{0.004}{\volt\per\ampere} + \SI{0.12}{\volt} =&~\SI{120}{\milli\volt}\\
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\SI{200}{\ampere} \cdot\SI{0.004}{\volt\per\ampere} + \SI{0.12}{\volt} =&~\SI{1040}{\milli\volt}
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\end{align}
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These values and the used 12bit ADCs gives a maximum resolution of around \SI{.2}{\ampere}
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\section{1.8V Output Regulation}
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The method for regulating the \SI{1.8}{\volt} output voltage consists of two parts.
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First the voltage, which is wanted at the output terminal and second the corresponding potentiometer setting to use for that voltage, on the other hand, to calculate the voltage to output, it is necessary to classify the connections between the PowerIts output terminals and reticles.
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\subsection{Potentiometer Mapping}
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Combining Equations~\ref{eq:rpot},~\ref{eq:rset}, and~\ref{eq:vout}, we gather \autoref{eq:fullreg}. This equation maps a given output voltage to a corresponding potentiometer setting (reverse to \autoref{fig:beh1v8}).
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\begin{align} \label{eq:fullreg}
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P_\text{val} = \frac{%
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R_\text{par} \left[ \left( \frac{0.7V \cdot 30.1k\Omega}{V_{O}-0.7V} - 6.49k\Omega \right) - R_\text{ser}\right]
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}{%
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R_\text{par} + \left( \frac{0.7V \cdot 30.1k\Omega}{V_{O}-0.7V} - 6.49k\Omega \right) - R_\text{ser}
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}\cdot
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\frac{256}{10k\Omega}
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\end{align}
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\subsection{Power Wafer}
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To test the \SI{1.8}{\volt} regulation the so called PowerWafer is going to be used.
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Its reticles can be controlled via the CURE board, similar to HICANN wafers, which are used in BrainScaleS, but the Power Wafer is different, as it cannot be used for any neuromorphic computation.
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Its internals are ohmic resistors, which provide a maximum power draw per reticle of what is possible inside a usable wafer module.
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% \begin{figure}[H]
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% \centering
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% \includegraphics[width=.8\columnwidth]{./data/theory/wafer.pdf}
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% \caption{Reticle diagram of a wafer in BrainScaleS. All 48 Reticles are shown. This Layout is an approximation of real world positioning. A single reticle has a width of \SI{20.0482}{\milli\meter} and height of \SI{20.145}{\milli\meter}, with additional space in between reticles of \SI{420}{\micro\meter} horizontally and \SI{250}{\micro\meter} vertically~\cite{waferembedding}}%
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% \label{fig:wafer}
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% \end{figure}
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It has the same layout as its system counterparts and each of the 48 reticles can be accessed digitally, as well as electrically.
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And like its system counterparts it is placed on a MainPCB (see \autoref{fig:mainpcb}).
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All CURE boards connect to it and control the PowerFETs, as well as provide voltage readout from each reticle.
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Also on the MainPCB are the AnaB boards.
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Note that here lies another specialization of the PowerWafer.
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All reticles' analog and digital \SI{1.8}{\volt} lines are connected directly to pins on the analog readout boards~\cite{anabpower}.
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There it is possible to access a voltage, which is measured after the load resistors in \autoref{fig:retmodel}
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(after \cite{waferembedding})
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\begin{figure}[H]
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\centering
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\includegraphics[width=\columnwidth]{./tikz/mainpcb_back.pdf}
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\caption{%
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A photograph of the top of the MainPCB (courtesy of Maurice G\"{u}ttler~\cite{waferembedding}).
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The board has a length and width of 43cm.
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Visible in the center are the PowerFETs (Field Effect Transistors) (1) which switch the power supply of each reticle.
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These are controlled via the CURE boards (2).
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In yellow the corresponding Reticle and its position is marked.
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All 48 Reticles are shown. A single reticle has a width of \SI{20.0482}{\milli\meter} and height of \SI{20.145}{\milli\meter}, with additional space in between reticles of \SI{420}{\micro\meter} horizontally and \SI{250}{\micro\meter} vertically~\cite{waferembedding}.
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The top-left and bottom right corner connectors (3) are for the AnaB boards.
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The main supply voltages V\(_\text{DDA}\) (red) and V\(_\text{DDD}\) (blue) are generated on the PowerIt and inserted at the marked screw connections.
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}%
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\label{fig:mainpcb}
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\end{figure}
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\subsection{Simple Wafer Resistance Model (SWRM)}\label{sec:swrm}
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When powering any reticle on a wafer system, the voltage on the PowerIt side is set to about \SI{1.9}{\volt}.
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This then results in the reticles receiving around \SI{1.8}{\volt}.
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Additionally when running experiments on a HICANN wafer, the current draw results in a drop of this received voltage.
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This behavior is the result of a resistance between power supply and reticles.
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To describe the resistances on such a wafer module, a model can be used.
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This model combines all resistances introduced through any connection point between supply terminal (copper pad on PowerIt) and PowerFET into R\(_0\).
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It also represents the connection between FET and reticle as another resistor R\(_1\).
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For this simple model the circuit in \autoref{fig:retmodel} is used.
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This naive model will be referenced as SWRM (Simple Wafer Resistance Model) from here.
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\begin{figure}[H]
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\centering
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\includegraphics[width=.4\columnwidth]{./tikz/reticlepower.pdf}
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\caption{
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SWRM circuit containing the to measure resistances and their currents. \(R_0\) describes the resistance of a connection between the PowerIt output and up to the FET (depicted as switch), while \(R_1\) is a resistance between FET and Reticles.
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The measurement is done between on the PowerIt and pins on a AnaB.
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}%
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\label{fig:retmodel}
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\end{figure}
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The SWRM circuit consists of two fixed resistance values and their respective currents as approximations of a real world system.
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It assumes that the connection to the nearest voltage connector is equal (electrically) for all reticles.
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In the SWRM, the current flowing through \(R_1\) will be either 0 or a constant current \(I_\text{ret}\).
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And the current through \(R_0\) will change depending on the number of reticles that are powered \(n_\text{ret}\)
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\begin{align}
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I_{ges} = n_{ret} \cdot I_{ret}
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\end{align}
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Therefore the voltage drop \(V_\text{drop}\) as measured by a voltmeter (connected as in \autoref{fig:retmodel}) can be described with \autoref{eq:vdip}
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\begin{align} \label{eq:vdip}
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V_\text{drop} =&\ V_{R_1} + V_{R_0} \nonumber\\
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=&\ R_1 \cdot I_\text{ret} + R_0 \cdot I_\text{ges} \nonumber\\
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=&\ I_\text{ret} \cdot \left( R_1 + R_0 \cdot n_\text{ret} \right)
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\end{align}
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\begin{align} \label{eq:voff}
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V_\text{drop} =& V_O - V_\text{off}\\
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\Rightarrow V_O =& I_\text{ret} \cdot \left( R_1 + R_0 \cdot n_\text{ret} \right) + V_\text{off}\label{eq:vout2}
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\end{align}
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Equations~\ref{eq:voff} and~\ref{eq:vout2} reference the desired voltage at reticle level V\(\text{off}\) and the voltage at a PowerIt terminal V\(_O\). |