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update regulation experiment and correct some things in intro and theory

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acereca 2018-08-20 22:00:39 +02:00
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data/theory/i48.pdf
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data/theory/mktheory.py
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@ -41,6 +41,8 @@ def gen_reg_theory():
)
plt.legend()
plt.xlabel("current (analog / digital) I / A")
plt.ylabel("P$_{val}$")
plt.savefig('reg.pdf')

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parts/experiments.tex
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@ -190,10 +190,11 @@ and the following four values are required, before a regulation can be attempted
\item \(V_{off}\), the wanted Voltage at a Reticle
\end{itemize}
\subsubsection{\(V_{off}\)}
This Value is the wanted settable, value which should be delivered to each Reticle.
To get a representative value of \(I_{ret}\) for use in the SWRM, the mean of all reticles current draw was taken (\autoref{fig:ihist}):
\subsubsection{\(I_{ret}\)}
\begin{align}
\pyval{iretmeancorr}
\end{align}
\begin{figure}[H]
\centering
@ -202,81 +203,100 @@ and the following four values are required, before a regulation can be attempted
\includegraphics[width=1.3\columnwidth]{../pitstop/20180819/reticle_ihist.pdf}
\caption{Distribution of analog current draw for all reticles on the PowerWafer (which were possible to measure \(\rightarrow\) \autoref{sec:pitfalls})}%
\label{fig:ihist}
\end{figure}
To get a representative value for use in the SWRM, the mean of all reticles current draw was taken:
\begin{align}
\pyval{iretmeancorr}
\end{align}
\subsubsection{\(R_1\)}
This Resistace can be obtained through extrapolating the observed voltage dip to 0 (using \autoref{eq:voff}, and the now obtained \(I_{ret}\)).
\begin{align}
V_O(0) =& I_{ret} \cdot R_1\nonumber\\
R_1 =& \SI{7.2357+-0.4417}{\milli\ohm}
\end{align}
%\begin{figure}[H]
% \centering
% \hspace*{-.16\columnwidth}
% \includegraphics[width=1.3\columnwidth]{./pitstop/20180807/ret_regulation.pdf}
% \caption{Potentiometer Setting (discrete integer), derived from ouput current (discrete floating point). }
% \label{numericalreg}
%\end{figure}
%Fitting these values, with a polynomial of 2nd degree, we obtain:
%\begin{align}
% P_{val} =& \lfloor m_2 \cdot I_{ana}^2 + m_1 \cdot I_{ana} + m_0 \rceil\\
% m_2 =& 51.390262 \frac 1 A\\
% m_1 =& -0.263850\frac 1 A\nonumber\\
% m_0 =& 0.000258\frac 1 A\nonumber
%\end{align}
%Which is the numeraical solution if the only desired voltage on HICAN Chips is 1.8V. But if we want to change these, we need a more general solution.
%Assuming the 2nd order Term to be small enough, we can assume a linear proportionality between the current and voltage:
%
%\begin{align}
%I_{ana, eff} = I_{ana} - \frac{V_{out}-1.8V}{c}
%\end{align}
%
%where c is obtained from the linear fit (incline) in figure \ref{1v8dip}
%\begin{align}
% c = 71.6978\cdot 10^{-3} \frac V A
%\end{align}
\end{figure}~\\
The \autoref{fig:ihist} was obtained by measuring the increase in current draw for each reticle, for each of the 4 patterns (\autoref{fig:wpattern}).\\\\
To obtain \(R_0\), the pattern in \autoref{fig:wafer-ret5} was used to take measurements for both the Neighborhood as well as the Farthest Reticles.
\begin{figure}[H]
\centering
\hspace*{-.1\columnwidth}
\includegraphics[width=1.2\columnwidth]{../pitstop/processing/neighborhoood_5.pdf}
\caption{ret5wafer}%
\hspace*{.1\columnwidth}
\includegraphics[width=.6\columnwidth]{../pitstop/processing/neighborhoood_5.pdf}
\vspace{-1cm}
\caption{Reticles used to determine correlation between distance and Voltage Drop}%
\label{fig:wafer-ret5}
\end{figure}
\begin{figure}[H]
\centering
\vspace*{-1cm}
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{./pitstop/20180807/reticle_corr}
\caption{ret5}%
\label{fig:ret5}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180820/reticle_corr}
\caption{Voltage Dip vs current for both Reticles in direct neighborhood and farthest possible Reticles}%
\label{fig:ret5corr}
\end{figure}
From \autoref{fig:ret5corr} it is possible to see that the distance between reticles that are used gives different behavior of the Voltage Dip. Both Inclines happen to be the extreme cases, while either being completely uncorrelated, the case for farthest Reticles, or being directly correlated by their distance, here observable for the neighboring Reticles.
Therefore we obtain two values for \(R_0\):
\begin{align}
\pyval{r0_from_neighbor}\\
\pyval{r0_from_farthest}\\
\pyval{r0mean}\\
\pyval{r0meancorr}
\pyval{r0_from_farthest}
\end{align}
from the same measurement it is also possible to extract \(R_1\) by extrapolating to 0, which results in:
\begin{align}
\pyval{r1_from_neighbor}\\
\pyval{r1_from_farthest}\\
\pyval{r1mean}\\
\pyval{r1meancorr}
\pyval{r1_from_farthest}
\end{align}
here the values obtained are within error margin of each other.
So applying these Values, the following behavior for regulation can be visualized:
\begin{figure}[H]
\centering
\hspace*{-.16\columnwidth}
\includegraphics[width=1.3\columnwidth]{./data/theory/reg.pdf}
\caption{possible \(P_{val}\) curves after SWRM, dotted lines represent not achievable values}%
\label{fig:regswrm}
\end{figure}
The in \autoref{fig:regswrm} visualized values show the theoretical \(P_{val}\) for the corresponding Current, whlie all dotted parts depict the values wich would be needed to achieve full correction at the Reticle level.
Note that the 1.8V regulation, should fail at about 80A of current draw.
Now that the SWRM is appliable, what about the DWRM, which removes the assuption of a equal Voltage Dip per Reticle, applying an offset to the initially observed Voltage of each Reticle.
To account for that, the Voltage Dip per Reticle, in a simgle Reticle power state, was observed:
\begin{figure}[H]
\centering
\vspace*{-1cm}
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180820/reticle_vdiphist.pdf}
\caption{initially observed Voltage Dip, Red values are ignored for corrected mean}%
\label{fig:vdiphist}
\end{figure}
and a mean of:
\begin{align}
\pyval{vdipmeancorr}
\end{align}
can be observed.
\begin{figure}[t]
\centering
% \hspace*{-.15\columnwidth}
\includegraphics[width=.7\columnwidth]{../pitstop/20180815/reticel_rdist.pdf}
\caption{\(V_{dip}\) Distribution over full Power Wafer; White have no measurement; Red an Orange are marked red in \autoref{fig:vdiphist}}%
\label{fig:wrdist}
\end{figure}
\autoref{fig:wrdist} shows how those Voltages are Distributed over the complete PowerWafer.
All white Reticles are not measurable, and those colored in Red and Yellow are the outliers in \autoref{fig:vdiphist}. Note that in a deployed, working, Wafer System inside BrainScaleS the iddle two Reticles are not used and also gicve grounds to ignoring the outliers.
This results in a distribution, which when combined with the spread of \(R_0\) from \autoref{fig:ret5corr}, gives an approximate range for all Reticles Voltage Dip at a given Current Draw (\autoref{fig:vrange}).
\begin{figure}[H]
\centering
\hspace*{-.15\columnwidth}
\includegraphics[width=1.3\columnwidth]{../pitstop/20180820/reticle_variance.pdf}
\caption{Expermentally obtained Voltage Ranges in which most Reticles Voltage Dip will lie, this does not include outliers}%
\label{fig:vrange}
\end{figure}
\section{Pitfalls} \label{sec:pitfalls}

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parts/intro.tex
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@ -3,15 +3,15 @@
\chapter{Introduction}
\section{What is the BrainScale System?}
\section{The BrainScale System}
The BrainScale Wafer System~\cite{hbpguidebook}, developed and used in the electronic visions Group at Heidelberg University is a neuromorhic hardware implementation.\\\\
For this thesis the following core components are of importantance:
The BrainScale Wafer System~\cite{hbpguidebook}, developed and used in the electronic visions Group at Heidelberg University is a neuromorphic hardware implementation.\\~\\
For this thesis the following core components are of importance:
\begin{itemize}
\item the mixed-signal ASICs, named HICANNs, structured in packs of 8 into ``Reticles''
\item the Control Units for Reticles, short CURE Boards
\item the analog breakout Boards, AnaB for short
\item and the power supply, called PowerIt.
\item mixed-signal ASICs, named HICANNs, structured in packs of 8 into Reticles
\item Control Units for Reticles, short CURE Boards
\item analog breakout Boards, AnaB for short
\item and power supply, called PowerIt.
\end{itemize}
\begin{figure}[H]
@ -23,7 +23,7 @@ For this thesis the following core components are of importantance:
\section{About the PowerIt Subsystem}
The main subject of this thesis is the PowerIt board (\autoref{fig:pitteststand}). It functions as power supply inside of the WaferScale System (\autoref{fig:wss}).
In which it is providing the Wafer with 1.8V and the FPGAs with 9.6V. Its maximum rated Powerdraw is 2kW.~\cite{poweritupgrade}
In which it is providing the Wafer with 1.8V and the FPGAs with 9.6V. Its maximum rated power draw is 2kW.~\cite{poweritupgrade}
\begin{figure}[h]
\centering
@ -31,17 +31,24 @@ In which it is providing the Wafer with 1.8V and the FPGAs with 9.6V. Its maximu
\caption{PowerIt Board, top view, receiving 48V as input (top left) and outputting 9.6V (top and bottom) as well as 1.8V (analog: top left, bottom right; digital: top right, bottom left)}\label{fig:pitteststand}
\end{figure}
The ``Brain'' of these PowerIt Boards is a STM32 Chip\footnote{STM32F405RGT~\cite{stm32f405xx}} which runs a custom Firmware based on ChibiOS~\cite{chibios}.
The Brain of these PowerIt Boards is a STM32 Chip\footnote{STM32F405RGT~\cite{stm32f405xx}} which runs a custom Firmware based on ChibiOS~\cite{chibios}.
The PowerIt, while providing 9.6V and 1.8V, also is able to measure the following Values:
\begin{itemize}
\item input Voltage and current
\item 1.8V output voltage and current
\item and the 9.6V output Voltage
\end{itemize}
Which can then be used inside the Firmware.
\newpage
\section{Intentions of this Work}
\section{Contents on Detail}
\begin{itemize}
\item Upgrade the PowerIt Firmware to be able to calibrate all on board measurements, voltages and currents.
This requires the Firmware to handle calibration changes on the fly.
This requires the Firmware to handle calibration changes on the fly, (each PowerIt requires its own configuration, which needs to be changed after the Firmware is running).
\item Provide a communication interface for changing those parameters at runtime.
Assuming v2 of the communication Protocol (PItCOMM) we require write access to all coefficients, defining the degree of polynomial is done at compile time.
It is required to have write access to all coefficients (defining the degree of polynomial is done at compile time).
\item Provide access to more parameters within the PowerIt while unifying the protocol used.
Collect all writable, readable and static parameters in a single interface using PItCOMM v2, creating a mapping for reference to those values.
@ -50,5 +57,5 @@ The ``Brain'' of these PowerIt Boards is a STM32 Chip\footnote{STM32F405RGT~\cit
Characterizing the circuits, providing a default for fallback and a Database file, readable by the BrainScaleS Monitoring System and the Person calibrating each Board.
\item Provide a regulation mechanism for stable, modifiable output at its endpoints.
The connection between PowerIt and HICANNs can be seen as a non trivial Resistor, which requires the 1.8V output to regulate based on experimental data.
The connection between PowerIt and HICANNs can be seen as a non zero Resistance, which requires the 1.8V output to regulate based on experimental data.
\end{itemize}

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parts/theory.tex
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@ -1,37 +1,40 @@
%! TEX root = ../thesis.tex
\chapter{Theory}
This Chapter will be discussing the fundamental principles used in the experiments. These will contain the circuis and their respective Equations as well as component behaviour as specified in their respective Datasheets by their Manufacturer
This Chapter will be discussing the fundamental principles used in the experiments. These will contain simplified circuits and their respective Equations as well as component behavior as specified in their respective datasheets by their Manufacturer
\section{Hardware Component Behavior}
Before discussing the experimental results it needs to be clear what circuitry is used in these experiments and what behavior we expect.
Keeping in mind, that these values are purely theoretical and will most likely not be exactly the same as those found in actual hardware.
Keeping in mind, that these are theoretical values and will most likely not be exactly the same as those found in actual hardware, as all values given will always be within some error as defined by their manufacturer.
Each of the three voltage regimes that will be observed on the PowerIt Board, 48V 9.6V and 1.8V, has a voltage- and in the cases of 48V and 1.8V also a current-measurement circuit. Additionaly we have a temperature sensor built into the STM32 Chip.
Each of the three voltage regimes that will be observed on the PowerIt Board, 48V 9.6V and 1.8V, has a voltage- and in the cases of 48V and 1.8V also a current-measurement circuit. Additionally we have a temperature sensor built into the STM32 Chip.
\subsection{48V Input Voltage}
\begin{figure}[H]
\centering
\includegraphics[width=.9\textwidth]{./tikz/mon48v.pdf}
\caption{Circuit for measuring the 48V input Voltage, consisting of input potential (left), two resistors as voltage divider, one full differential isolation amplifier (full Diff Op Amp, left), one operational Amplifier (right), output voltage as well as the connection to the STM32-Chips input pin (right)}%
\caption{Circuit for measuring the 48V input Voltage, consisting of input potential (left), two resistors as voltage divider, one fully differential isolation amplifier (left), one operational Amplifier (right), output voltage as well as the connection to the STM32-Chips input pin (right)}%
\label{mon48v}
\end{figure}
The circuits for measuring input Voltage and current are the most complex, because for Voltage measurement the circuit needs to
The circuits for measuring input voltage and current are the most complex, because for Voltage measurement the circuit needs to
\begin{itemize}
\item divide our input voltage into a usable potential range
\item decouple the input from our signal potential
\item amplify the voltage, to be in the Chips Voltage range of 0--3.3V
\item decouple the input (48V) from signal potential (3.3V)
\item amplify the voltage, to be in the STM32-Chips Voltage range of 0--3.3V
\end{itemize}
The already implemented Cicuit can be seen in \autoref{mon48v}.
It consists of a 1:240 Voltage Divider, a full differential isolation amplifier taking in the \(\approx\) 200mV (nominal voltage range), and amplifying it by a factor of 8 (\(r_\text{diffOpAmp}\)~\cite{diffopamp}).
It consists of a 1:240 Voltage Divider, a full differential isolation amplifier taking in the roughly 200mV (nominal voltage range), and amplifying it by a factor of 8 (\(r_\text{diffOpAmp}\)~\cite{diffopamp}).
It is also decoupling the input and output voltages, so our 48V and 3.3V circuit parts are electricly insulated.
The remaining operational amplifier provides futher amplification by a factor of 1.1 (\(r_\text{OpAmp}\))
The remaining operational amplifier provides difference to single ended Conversion with an amplification or 1.1 (\(r_\text{OpAmp}\))
This circuit results in the following equation for calculating the input voltage from a pin voltage:
\begin{align}
V_\text{48V in}\cdot\frac{R_1}{R_1+R_2} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} =&~V_\text{48V pin}\nonumber\\
\Leftrightarrow \quad \frac{V_\text{48V pin}}{r_\text{diffOpAmp}\cdot r_\text{OpAmp}}\cdot\frac{R_1+R_2}{R_1} =&~V_\text{48V in}
V_\text{48V in}\cdot\frac{R_1}{R_1+R_2} \cdot r_\text{diffOpAmp} \cdot r_\text{OpAmp} =&~V_\text{MONITOR\_48V}\nonumber\\
\Leftrightarrow \quad \frac{V_\text{MONITOR\_48V}}{r_\text{diffOpAmp}\cdot r_\text{OpAmp}}\cdot\frac{R_1+R_2}{R_1} =&~V_\text{48V in}
\intertext{and the extremes, when assuming 48V\(\pm 10\%\) are}
V_\text{MONITOR\_48V, min} = \SI{43.2}{\volt}\cdot\frac{1}{240+1}\cdot 8\cdot 1.1 =&~\SI{1.5774}{\volt}\\
V_\text{MONITOR\_48V, max} = \SI{52.8}{\volt}\cdot\frac{1}{240+1}\cdot 8\cdot 1.1 =&~\SI{1.9280}{\volt}
\end{align}

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thesis.tex
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@ -24,11 +24,15 @@
\thispagestyle{empty}
\begin{abstract}
Monitoring System status and regulation parameters within a complex System such as BrainScaleS, provides multiple critical points, which in case of misbehaviour can result in problems within the complete system.
To reduce the eroneous data created within BarainScaleS, the PowerIt Board, one of its submodules, was upgraded and received a software ovehaul, containing calibration for the on board measurements and regultion capability for its most critical output terminal.
This Thesis will address Calibration and Regulation of the in BrainScaleS used power delivery Board, PowerIt.
Its circuitry will be examined and calibrated, for use in BrainScaleS' monitoring and a method of regulating the 1.8V Output Terminal will be implemented.
This thesis also contains the changes done to the PowerIt Firmware while working on these Problems.
\\\\
Monitoring System Status und Regulations Parameter innerhalb eines komplexen Systems, wie etwa BrainScaleS, entahlten kritische Punkte des Systems, welche im Flalle eines Fehlers in Promblemen mit dem kompletten System resultieren können. Um die innerhalb von BrainScales erzeugten fehlerhaften Daten zu reduzieren, hat das PowerIt Submodul ein Firmware Upgrade erhalten, diese enthält nun Kalibrationen für die Board eigenen Messungen, sowie die Fähigkeit die Systemkritischen Ausgänge zu regulieren.
Diese Arbeit befasst sich mit de Kalibration und Regulation der PowerIt Komponenete des BrainScale Systems. Die Schaltungen werden untersucht und kalibriert, damit sie in der Systemüberwachung von nutzen sein können.
Ausserdem enthält diese Arbeit die Änderungen, die dabei auf die PowerIt Firmware angewendet werden.
\end{abstract}
\setcounter{tocdepth}{1}