update 20180727

2018-07-27 15:12:32 +02:00 · 2018-07-27 15:12:32 +02:00 · 1a851697b7
parent 7b58157497
commit 1a851697b7
9 changed files with 250 additions and 21 deletions
--- a/data/m03_poticalib/recalc.py
+++ b/data/m03_poticalib/recalc.py
@ -0,0 +1,74 @@
+#! python3
+import pandas as pd
+import matplotlib.pyplot as plt
+
+import VisTools.plotting as vp
+import ruamel.yaml
+
+yaml = ruamel.yaml.YAML()
+
+data = pd.read_csv('./log_poticalib_ana_02.csv')
+
+print(data.columns)
+
+data['val_poti'] = [int(i, 16) for i in data['val_poti']]
+
+def poll_db(uuid: str):
+
+        db = []
+        with open("./pitstop/pitdb.yaml") as f:
+            db_raw = yaml.load_all(f)
+
+            for doc in db_raw:
+                db.append(doc)
+
+        for doc in db:
+            doc = dict(doc)
+            if doc['id'] == uuid:
+                return doc
+        return None
+
+def __calc_vpin(data: pd.DataFrame, poly):
+        m = poly
+
+        if m[2] != 0:
+            data['x'] = 4 * m[2] * (data['v_pit/v'] - m[0]) + m[1]**2
+            data['x'] = np.sqrt(data['x'].tolist())
+            data['x'] -= m[1]
+            data['x'] /= (2 * m[2])
+        else:
+            data['x'] = (data['v_pit/v'] - m[0]) / m[1]
+
+        return data
+
+default = poll_db('default')
+
+data = __calc_vpin(data, default['poly18v'])
+
+plt.errorbar(
+    data['x'],
+    data['v_pit/v'],
+    fmt='.'
+)
+
+plt.errorbar(
+    data['x'],
+    data['v_keith/v'],
+    fmt='.'
+)
+
+res = vp.fit(
+    data['x'],
+    data['v_keith/v'],
+    lambda x,m0,m1,m2: m0+m1*x+m2*x*x,
+    default['poly18v']
+)
+
+plt.plot(
+    data['x'],
+    [res[0].n+e*res[1].n+res[2].n*e*e for e in data['x']]
+)
+
+print('poly18v:',[round(e.n,4) for e in res])
+plt.show()
+
--- a/parts/experiments.tex
+++ b/parts/experiments.tex
@ -156,7 +156,7 @@ The secondary plots confirm the
        \begin{figure}[H]
            \centering
            \hspace*{-.16\columnwidth}
-            \includegraphics[width=1.3\columnwidth]{pitstop/20180629/i18ana_postcalib.pdf}
+            \includegraphics[width=1.3\columnwidth]{../pitstop/20180702/i18ana_postcalib.pdf}
            \caption{Post Calibration Measurement of Output Current at the 1.8V Analog Terminal (29.06.2018}
            \label{postcalib18iana}
        \end{figure}
@ -165,7 +165,49 @@ The secondary plots confirm the

 \subsection{Characterization of Dropoff}

-\subsection{after <METHOD>-Correction}
+Wanting to observe and characterize the voltage drop, happening between the PowerIt output terminal and the HICANN Chips, first the in figure \ref{1v8dip} monitored behavior can be seen.
+
+\begin{figure}[H]
+    \centering
+    \hspace*{-.16\columnwidth}
+    \includegraphics[width=1.3\columnwidth]{../pitstop/20180727/ret_vdip.pdf}
+    \caption{Voltage dip observed between PowerIt and HICANN, each point represents the state after enabling additional Reticles on the PowerWafer}
+    \label{1v8dip}
+\end{figure}
+
+\subsection{after Numerical-Correction}
+
+The initial approach is a numerical. Through derivation from figures \ref{1v8dip} and \ref{v18_precalib} we can plot a function which maps the measured output current to a corresponding potentiometer setting (fig. \ref{numericalreg}) for which the observed dropoff will be mitigated (or at least near that). Also important is that it is not possible to use non interger values for the potentiometer setting.
+
+\begin{figure}[H]
+    \centering
+    \hspace*{-.16\columnwidth}
+    \includegraphics[width=1.3\columnwidth]{../pitstop/20180727/ret_regulation.pdf}
+    \caption{Potentiometer Setting (discrete integer), derived from ouput current (discrete floating point). }
+    \label{numericalreg}
+\end{figure}
+
+Fitting these values, with a polynomial of 2nd degree, we obtain:
+\begin{align}
+    P_{val} =& \lfloor m_2 \cdot I_{ana}^2 + m_1 \cdot I_{ana} + m_0 \rceil\\
+    m_2 =& 51.390262 \frac 1 A\\ 
+    m_1 =& -0.263850\frac 1 A\nonumber\\
+    m_0 =& 0.000258\frac 1 A\nonumber
+\end{align}
+
+Which is the numeraical solution if the only desired voltage on HICAN Chips is 1.8V. But if we want to change these, we need a more general solution.
+
+Assuming the 2nd order Term to be small enough, we can assume a linear proportionality between the current and voltage:
+
+\begin{align}
+I_{ana, eff} = I_{ana} - \frac{V_{out}-1.8V}{c}
+\end{align}
+
+where c is obtained from the linear fit (incline) in figure \ref{1v8dip}
+
+\begin{align}
+    c = 71.6978\cdot 10^{-3} \frac V A
+\end{align}

 \section{Pitfalls}

--- a/parts/theory.tex
+++ b/parts/theory.tex
@ -106,3 +106,26 @@ While the measurements done by the STM32-Chip are using a 12bit ADC, we don't ha

 \section{1.8V Output Regulation}
 %\section{Firmware Requirements}
+
+\section{Power Wafer}
+To test the 1.8V Regulation the so called Power Wafer is going to be used, it bahves similarly to a in BrainScales used "fuctional" Wafer module. But it is fundamentally different, as it cannot be used for computation, but only to test for voltages and currents. Its internals behave like switchable ohmic resistors, which provides us with a macimum power draw per section (Reticle) of what is allowed inside a usable wafer.
+
+Like its counterparts, it has the same Layout
+
+\begin{figure}[H]
+    \centering
+    \includegraphics[width=\columnwidth]{../pitstop/20180727/ret_pic.pdf}
+    \caption{example diagram of power wafer, 16 Reticles in use}
+\end{figure}
+
+and each of the 48 Reticles can be accessed, digitaly as well as electricaly.
+
+For this work the following circuit can be used to describe the connections, powering these Reticles.
+
+\begin{figure}[H]
+    \centering
+    %TODO: unclude simplified resistor ladder
+    \includegraphics[width=1.3\paperwidth]{<`4`>}
+    \caption{<`5`>}
+    \label{<`6`>}
+\end{figure}
--- a/tabs/registerbuffer.tex
+++ b/tabs/registerbuffer.tex
@ -18,26 +18,27 @@
        0x42 & polyFit.T            & float arr & 12 & rw\\
        \hline
        0x4e & sampleTicks          & byte      & 1  & rw\\
+        0x4f & V\_out                & float     & 4  & rw\\
        \hline
-        0x4f & TEMP\_SENSOR         & float     & 4  & r\\
-        0x53 & EXT\_AIN             & float     & 4  & r\\
-        0x57 & MONITOR\_48V         & float     & 4  & r\\
-        0x5b & MONITOR\_48I         & float     & 4  & r\\
-        0x5f & MONITOR\_8VBUS       & float     & 4  & r\\
-        0x63 & MONITOR\_8IBUS       & float     & 4  & r\\
-        0x67 & MONITOR\_8V\_0       & float     & 4  & r\\
-        0x6b & MONITOR\_8V\_1       & float     & 4  & r\\
-        0x6f & MONITOR\_8V\_2       & float     & 4  & r\\
-        0x73 & MONITOR\_8V\_3       & float     & 4  & r\\
-        0x77 & VDD\_1V8\_ANA        & float     & 4  & r\\
-        0x7b & VDD\_1V8\_IOUT\_ANA  & float     & 4  & r\\
-        0x7f & VDD\_1V8\_DIGI       & float     & 4  & r\\
-        0x83 & VDD\_1V8\_IOUT\_DIGI & float     & 4  & r\\
+        0x53 & TEMP\_SENSOR         & float     & 4  & r\\
+        0x57 & EXT\_AIN             & float     & 4  & r\\
+        0x5b & MONITOR\_48V         & float     & 4  & r\\
+        0x5f & MONITOR\_48I         & float     & 4  & r\\
+        0x63 & MONITOR\_8VBUS       & float     & 4  & r\\
+        0x67 & MONITOR\_8IBUS       & float     & 4  & r\\
+        0x6b & MONITOR\_8V\_0       & float     & 4  & r\\
+        0x6f & MONITOR\_8V\_1       & float     & 4  & r\\
+        0x73 & MONITOR\_8V\_2       & float     & 4  & r\\
+        0x77 & MONITOR\_8V\_3       & float     & 4  & r\\
+        0x7b & VDD\_1V8\_ANA        & float     & 4  & r\\
+        0x7f & VDD\_1V8\_IOUT\_ANA  & float     & 4  & r\\
+        0x83 & VDD\_1V8\_DIGI       & float     & 4  & r\\
+        0x87 & VDD\_1V8\_IOUT\_DIGI & float     & 4  & r\\
        \hline
-        0x87 & CommitHash           & float     & 4  & s\\
-        0x8b & CommitDirtyFlag      & byte      & 1  & s\\
-        0x8c & STM32UUID            & 96bit     & 12 & s\\
+        0x8b & CommitHash           & float     & 4  & s\\
+        0x8f & CommitDirtyFlag      & byte      & 1  & s\\
+        0x90 & STM32UUID            & 96bit     & 12 & s\\
    \end{tabular}
-    \caption{memory mapping of the packed struct moved over i2c}
+    \caption{memory mapping of the packed struct moved over i2c, \mintinline{cpp}{addr} is the address to use, \mintinline{cpp}{type} is the c++ type, \mintinline{cpp}{size} is in bytes and \mintinline{cpp}{perm} denotes read-writability. writability}
    \label{registerbuffer}
 \end{figure}
--- a/thesis.tex
+++ b/thesis.tex
@ -20,7 +20,7 @@
    \thispagestyle{empty}

    \begin{abstract}
-        Monitoring System status and regulation parameters within a complex System such as BrainScaleS, provides multiple critical points, which in case of misbehaviour can result in problems within the complete system. To reduce the eroneous data created within BarainScaleS, the PowerIt Board, one of its submodules, was upgraded and received a software ovehaul, containing calibration for the on board measurements and regultion capability for its most critical output terminal.
+        Monitoring System status and regulation parameters within a complex System such as BrainScaleS, provides multiple critical points, which in case of misbehaviour can result in problems within the complete system. To reduce the eroneous data created within BarainScaleS, the PowerIt Board, one of its submodules, was upgraded and received a software ovehaul, containing calibration for the on board measurements and regultion capability for its most critical output terminal. 
    \end{abstract}

    \setcounter{tocdepth}{1}
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+++ b/tikz/reticlepower.pdf
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+</svg>
--- a/tikz/reticlepower.synctex(busy)
+++ b/tikz/reticlepower.synctex(busy)
--- a/tikz/reticlepower.tex
+++ b/tikz/reticlepower.tex
@ -0,0 +1,14 @@
+\documentclass[convert={outfile=\jobname.svg}]{standalone}
+\input{./tikzpreamble}
+
+\begin{document}
+\begin{circuitikz}[scale=2]
+
+    \draw[color=black, thick]
+    (0,0) 
+      to [R, l={R0}, short, o-] (0,1)
+      to [R, l={R1}, short, o-] (0,2)
+    ;
+
+\end{circuitikz}
+\end{document}